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operation as a write barrier. That description has never been correct, and it has caused confusion. An acquire operation orders writes as well as reads, and a release operation orders reads as well as writes. Also, explicitly say that a thread doesn't see its own accesses being reordered. The reordering of a thread's accesses is only (potentially) visible to another thread. Thus, memory barriers need only be used to control the ordering of accesses between threads, not within a thread. Reviewed by: bde, kib Discussed with: jhb MFC after: 1 week
428 lines
11 KiB
Groff
428 lines
11 KiB
Groff
.\" Copyright (c) 2000-2001 John H. Baldwin <jhb@FreeBSD.org>
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE DEVELOPERS ``AS IS'' AND ANY EXPRESS OR
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.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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.\" IN NO EVENT SHALL THE DEVELOPERS BE LIABLE FOR ANY DIRECT, INDIRECT,
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.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd August 14, 2015
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.Dt ATOMIC 9
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.Os
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.Sh NAME
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.Nm atomic_add ,
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.Nm atomic_clear ,
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.Nm atomic_cmpset ,
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.Nm atomic_fetchadd ,
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.Nm atomic_load ,
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.Nm atomic_readandclear ,
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.Nm atomic_set ,
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.Nm atomic_subtract ,
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.Nm atomic_store
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.Nd atomic operations
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.Sh SYNOPSIS
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.In sys/types.h
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.In machine/atomic.h
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.Ft void
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.Fn atomic_add_[acq_|rel_]<type> "volatile <type> *p" "<type> v"
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.Ft void
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.Fn atomic_clear_[acq_|rel_]<type> "volatile <type> *p" "<type> v"
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.Ft int
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.Fo atomic_cmpset_[acq_|rel_]<type>
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.Fa "volatile <type> *dst"
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.Fa "<type> old"
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.Fa "<type> new"
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.Fc
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.Ft <type>
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.Fn atomic_fetchadd_<type> "volatile <type> *p" "<type> v"
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.Ft <type>
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.Fn atomic_load_acq_<type> "volatile <type> *p"
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.Ft <type>
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.Fn atomic_readandclear_<type> "volatile <type> *p"
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.Ft void
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.Fn atomic_set_[acq_|rel_]<type> "volatile <type> *p" "<type> v"
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.Ft void
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.Fn atomic_subtract_[acq_|rel_]<type> "volatile <type> *p" "<type> v"
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.Ft void
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.Fn atomic_store_rel_<type> "volatile <type> *p" "<type> v"
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.Ft <type>
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.Fn atomic_swap_<type> "volatile <type> *p" "<type> v"
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.Ft int
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.Fn atomic_testandset_<type> "volatile <type> *p" "u_int v"
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.Sh DESCRIPTION
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Each of the atomic operations is guaranteed to be atomic across multiple
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threads and in the presence of interrupts.
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They can be used to implement reference counts or as building blocks for more
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advanced synchronization primitives such as mutexes.
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.Ss Types
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Each atomic operation operates on a specific
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.Fa type .
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The type to use is indicated in the function name.
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The available types that can be used are:
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.Pp
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.Bl -tag -offset indent -width short -compact
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.It Li int
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unsigned integer
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.It Li long
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unsigned long integer
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.It Li ptr
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unsigned integer the size of a pointer
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.It Li 32
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unsigned 32-bit integer
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.It Li 64
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unsigned 64-bit integer
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.El
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.Pp
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For example, the function to atomically add two integers is called
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.Fn atomic_add_int .
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.Pp
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Certain architectures also provide operations for types smaller than
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.Dq Li int .
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.Pp
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.Bl -tag -offset indent -width short -compact
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.It Li char
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unsigned character
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.It Li short
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unsigned short integer
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.It Li 8
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unsigned 8-bit integer
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.It Li 16
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unsigned 16-bit integer
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.El
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.Pp
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These must not be used in MI code because the instructions to implement them
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efficiently might not be available.
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.Ss Acquire and Release Operations
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By default, a thread's accesses to different memory locations might not be
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performed in
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.Em program order ,
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that is, the order in which the accesses appear in the source code.
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To optimize the program's execution, both the compiler and processor might
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reorder the thread's accesses.
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However, both ensure that their reordering of the accesses is not visible to
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the thread.
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Otherwise, the traditional memory model that is expected by single-threaded
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programs would be violated.
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Nonetheless, other threads in a multithreaded program, such as the
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.Fx
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kernel, might observe the reordering.
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Moreover, in some cases, such as the implementation of synchronization between
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threads, arbitrary reordering might result in the incorrect execution of the
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program.
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To constrain the reordering that both the compiler and processor might perform
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on a thread's accesses, the thread should use atomic operations with
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.Em acquire
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and
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.Em release
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semantics.
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.Pp
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Most of the atomic operations on memory have three variants.
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The first variant performs the operation without imposing any ordering
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constraints on memory accesses to other locations.
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The second variant has acquire semantics, and the third variant has release
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semantics.
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In effect, operations with acquire and release semantics establish one-way
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barriers to reordering.
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.Pp
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When an atomic operation has acquire semantics, the effects of the operation
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must have completed before any subsequent load or store (by program order) is
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performed.
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Conversely, acquire semantics do not require that prior loads or stores have
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completed before the atomic operation is performed.
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To denote acquire semantics, the suffix
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.Dq Li _acq
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is inserted into the function name immediately prior to the
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.Dq Li _ Ns Aq Fa type
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suffix.
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For example, to subtract two integers ensuring that subsequent loads and
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stores happen after the subtraction is performed, use
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.Fn atomic_subtract_acq_int .
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.Pp
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When an atomic operation has release semantics, the effects of all prior
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loads or stores (by program order) must have completed before the operation
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is performed.
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Conversely, release semantics do not require that the effects of the
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atomic operation must have completed before any subsequent load or store is
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performed.
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To denote release semantics, the suffix
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.Dq Li _rel
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is inserted into the function name immediately prior to the
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.Dq Li _ Ns Aq Fa type
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suffix.
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For example, to add two long integers ensuring that all prior loads and
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stores happen before the addition, use
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.Fn atomic_add_rel_long .
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.Pp
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The one-way barriers provided by acquire and release operations allow the
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implementations of common synchronization primitives to express their
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ordering requirements without also imposing unnecessary ordering.
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For example, for a critical section guarded by a mutex, an acquire operation
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when the mutex is locked and a release operation when the mutex is unlocked
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will prevent any loads or stores from moving outside of the critical
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section.
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However, they will not prevent the compiler or processor from moving loads
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or stores into the critical section, which does not violate the semantics of
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a mutex.
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.Ss Multiple Processors
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In multiprocessor systems, the atomicity of the atomic operations on memory
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depends on support for cache coherence in the underlying architecture.
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In general, cache coherence on the default memory type,
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.Dv VM_MEMATTR_DEFAULT ,
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is guaranteed by all architectures that are supported by
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.Fx .
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For example, cache coherence is guaranteed on write-back memory by the
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.Tn amd64
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and
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.Tn i386
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architectures.
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However, on some architectures, cache coherence might not be enabled on all
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memory types.
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To determine if cache coherence is enabled for a non-default memory type,
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consult the architecture's documentation.
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.Ss Semantics
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This section describes the semantics of each operation using a C like notation.
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.Bl -hang
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.It Fn atomic_add p v
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.Bd -literal -compact
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*p += v;
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.Ed
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.It Fn atomic_clear p v
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.Bd -literal -compact
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*p &= ~v;
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.Ed
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.It Fn atomic_cmpset dst old new
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.Bd -literal -compact
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if (*dst == old) {
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*dst = new;
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return (1);
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} else
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return (0);
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.Ed
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.El
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.Pp
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The
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.Fn atomic_cmpset
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functions are not implemented for the types
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.Dq Li char ,
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.Dq Li short ,
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.Dq Li 8 ,
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and
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.Dq Li 16 .
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.Bl -hang
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.It Fn atomic_fetchadd p v
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.Bd -literal -compact
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tmp = *p;
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*p += v;
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return (tmp);
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.Ed
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.El
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.Pp
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The
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.Fn atomic_fetchadd
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functions are only implemented for the types
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.Dq Li int ,
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.Dq Li long
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and
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.Dq Li 32
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and do not have any variants with memory barriers at this time.
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.Bl -hang
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.It Fn atomic_load p
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.Bd -literal -compact
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return (*p);
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.Ed
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.El
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.Pp
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The
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.Fn atomic_load
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functions are only provided with acquire memory barriers.
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.Bl -hang
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.It Fn atomic_readandclear p
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.Bd -literal -compact
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tmp = *p;
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*p = 0;
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return (tmp);
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.Ed
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.El
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.Pp
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The
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.Fn atomic_readandclear
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functions are not implemented for the types
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.Dq Li char ,
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.Dq Li short ,
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.Dq Li ptr ,
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.Dq Li 8 ,
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and
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.Dq Li 16
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and do not have any variants with memory barriers at this time.
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.Bl -hang
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.It Fn atomic_set p v
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.Bd -literal -compact
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*p |= v;
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.Ed
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.It Fn atomic_subtract p v
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.Bd -literal -compact
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*p -= v;
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.Ed
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.It Fn atomic_store p v
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.Bd -literal -compact
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*p = v;
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.Ed
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.El
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.Pp
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The
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.Fn atomic_store
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functions are only provided with release memory barriers.
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.Bl -hang
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.It Fn atomic_swap p v
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.Bd -literal -compact
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tmp = *p;
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*p = v;
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return (tmp);
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.Ed
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.El
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.Pp
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The
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.Fn atomic_swap
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functions are not implemented for the types
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.Dq Li char ,
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.Dq Li short ,
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.Dq Li ptr ,
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.Dq Li 8 ,
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and
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.Dq Li 16
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and do not have any variants with memory barriers at this time.
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.Bl -hang
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.It Fn atomic_testandset p v
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.Bd -literal -compact
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bit = 1 << (v % (sizeof(*p) * NBBY));
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tmp = (*p & bit) != 0;
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*p |= bit;
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return (tmp);
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.Ed
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.El
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.Pp
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The
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.Fn atomic_testandset
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functions are only implemented for the types
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.Dq Li int ,
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.Dq Li long
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and
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.Dq Li 32
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and do not have any variants with memory barriers at this time.
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.Pp
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The type
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.Dq Li 64
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is currently not implemented for any of the atomic operations on the
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.Tn arm ,
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.Tn i386 ,
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and
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.Tn powerpc
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architectures.
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.Sh RETURN VALUES
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The
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.Fn atomic_cmpset
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function returns the result of the compare operation.
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The
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.Fn atomic_fetchadd ,
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.Fn atomic_load ,
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.Fn atomic_readandclear ,
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and
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.Fn atomic_swap
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functions return the value at the specified address.
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The
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.Fn atomic_testandset
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function returns the result of the test operation.
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.Sh EXAMPLES
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This example uses the
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.Fn atomic_cmpset_acq_ptr
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and
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.Fn atomic_set_ptr
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functions to obtain a sleep mutex and handle recursion.
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Since the
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.Va mtx_lock
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member of a
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.Vt "struct mtx"
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is a pointer, the
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.Dq Li ptr
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type is used.
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.Bd -literal
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/* Try to obtain mtx_lock once. */
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#define _obtain_lock(mp, tid) \\
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atomic_cmpset_acq_ptr(&(mp)->mtx_lock, MTX_UNOWNED, (tid))
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/* Get a sleep lock, deal with recursion inline. */
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#define _get_sleep_lock(mp, tid, opts, file, line) do { \\
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uintptr_t _tid = (uintptr_t)(tid); \\
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\\
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if (!_obtain_lock(mp, tid)) { \\
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if (((mp)->mtx_lock & MTX_FLAGMASK) != _tid) \\
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_mtx_lock_sleep((mp), _tid, (opts), (file), (line));\\
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else { \\
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atomic_set_ptr(&(mp)->mtx_lock, MTX_RECURSE); \\
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(mp)->mtx_recurse++; \\
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} \\
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} \\
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} while (0)
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.Ed
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.Sh HISTORY
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The
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.Fn atomic_add ,
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.Fn atomic_clear ,
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.Fn atomic_set ,
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and
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.Fn atomic_subtract
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operations were first introduced in
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.Fx 3.0 .
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This first set only supported the types
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.Dq Li char ,
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.Dq Li short ,
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.Dq Li int ,
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and
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.Dq Li long .
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The
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.Fn atomic_cmpset ,
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.Fn atomic_load ,
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.Fn atomic_readandclear ,
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and
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.Fn atomic_store
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operations were added in
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.Fx 5.0 .
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The types
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.Dq Li 8 ,
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.Dq Li 16 ,
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.Dq Li 32 ,
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.Dq Li 64 ,
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and
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.Dq Li ptr
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and all of the acquire and release variants
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were added in
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.Fx 5.0
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as well.
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The
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.Fn atomic_fetchadd
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operations were added in
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.Fx 6.0 .
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The
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.Fn atomic_swap
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and
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.Fn atomic_testandset
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operations were added in
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.Fx 10.0 .
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