351f1c21ec
A quick story, which is partially documented in the commit. The silicon revision in Linux ath9k and the Atheros HAL use an AR_SREV_REVISION mask of 0x07. FreeBSD's HAL uses the AR5212 AR_SREV_REVISION mask of 0x0F. Thus the OWL silicon revisions were coming through as 0xA, 0xB, 0xC, rather than 0x0, 0x1 and 0x2. My ath9k-sourced AR_SREV_OWL_<X> macros were thus using the wrong silicon revision values and wouldn't correctly match. This commit does a few things: * Change the AR_SREV_OWL_<x> macros to use the AR_SREV_REVISION_OWL_* values, not AR_XSREV_REVISION_OWL macros; * Disable AR_XSREV_REVISION_OWL_* values; * Modify the IS_5416 to properly check the MAC is OWL, rather than potentially matching on non-OWL revisions (which shouldn't happen unless there's a silicon revision of higher than 0x9 in a later chip..) * Add a couple more macros from the Atheros HAL for compatibility. The main difference now is that the Atheros HAL defines AR_SREV_OWL_{20,22}_OR_LATER subtly differently - it fails on all HOWL silicon. The AR_SREV_5416_*_OR_LATER macros match on the relevant OWL version -and- all HOWL versions, along with subsequent versions. A subsequent commit is going to migrate the uses of AR_SREV_OWL_X_OR_LATER to AR_SREV_5416_X_OR_LATER to match what's going on in the Atheros HAL. There's only two uses of AR_SREV_OWL_X_OR_LATER which currently don't apply to FreeBSD but it may do in the future. Yes, it's all confusing! |
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.. | ||
ath_hal | ||
ath_rate | ||
ah_osdep.c | ||
ah_osdep.h | ||
if_ath_ahb.c | ||
if_ath_debug.c | ||
if_ath_debug.h | ||
if_ath_keycache.c | ||
if_ath_keycache.h | ||
if_ath_misc.h | ||
if_ath_pci.c | ||
if_ath_sysctl.c | ||
if_ath_sysctl.h | ||
if_ath_tx_ht.c | ||
if_ath_tx_ht.h | ||
if_ath_tx.c | ||
if_ath_tx.h | ||
if_ath.c | ||
if_athioctl.h | ||
if_athrate.h | ||
if_athvar.h |