e054583277
MSI are implemented via software interrupt. PCIe cards will write into software interrupt register which will cause inbound shared interrupt which will be interpreted as a MSI. Obtained from: Marvell, Semihalf
140 lines
4.9 KiB
C
140 lines
4.9 KiB
C
/*-
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* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* from: FreeBSD: //depot/projects/arm/src/sys/arm/xscale/pxa2x0/pxa2x0var.h, rev 1
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*
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* $FreeBSD$
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*/
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#ifndef _MVVAR_H_
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#define _MVVAR_H_
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/pmap.h>
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#include <machine/vm.h>
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#define MV_TYPE_PCI 0
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#define MV_TYPE_PCIE 1
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#define MV_MODE_ENDPOINT 0
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#define MV_MODE_ROOT 1
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struct gpio_config {
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int gc_gpio; /* GPIO number */
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uint32_t gc_flags; /* GPIO flags */
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int gc_output; /* GPIO output value */
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};
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struct decode_win {
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int target; /* Mbus unit ID */
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int attr; /* Attributes of the target interface */
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vm_paddr_t base; /* Physical base addr */
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uint32_t size;
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vm_paddr_t remap;
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};
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extern const struct pmap_devmap pmap_devmap[];
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extern const struct gpio_config mv_gpio_config[];
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extern const struct decode_win *cpu_wins;
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extern const struct decode_win *idma_wins;
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extern const struct decode_win *xor_wins;
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extern int idma_wins_no;
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extern int xor_wins_no;
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/* Function prototypes */
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int mv_gpio_setup_intrhandler(const char *name, driver_filter_t *filt,
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void (*hand)(void *), void *arg, int pin, int flags, void **cookiep);
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void mv_gpio_intr_mask(int pin);
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void mv_gpio_intr_unmask(int pin);
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void mv_gpio_out(uint32_t pin, uint8_t val, uint8_t enable);
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uint8_t mv_gpio_in(uint32_t pin);
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int platform_gpio_init(void);
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int soc_decode_win(void);
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void soc_id(uint32_t *dev, uint32_t *rev);
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void soc_dump_decode_win(void);
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uint32_t soc_power_ctrl_get(uint32_t mask);
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void soc_power_ctrl_set(uint32_t mask);
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uint64_t get_sar_value(void);
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int decode_win_cpu_set(int target, int attr, vm_paddr_t base, uint32_t size,
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vm_paddr_t remap);
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int decode_win_overlap(int, int, const struct decode_win *);
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int win_cpu_can_remap(int);
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void decode_win_pcie_setup(u_long);
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int ddr_is_active(int i);
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uint32_t ddr_base(int i);
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uint32_t ddr_size(int i);
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uint32_t ddr_attr(int i);
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uint32_t ddr_target(int i);
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uint32_t cpu_extra_feat(void);
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uint32_t get_tclk(void);
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uint32_t get_l2clk(void);
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uint32_t read_cpu_ctrl(uint32_t);
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void write_cpu_ctrl(uint32_t, uint32_t);
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#if defined(SOC_MV_ARMADAXP)
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uint32_t read_cpu_mp_clocks(uint32_t reg);
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void write_cpu_mp_clocks(uint32_t reg, uint32_t val);
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uint32_t read_cpu_misc(uint32_t reg);
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void write_cpu_misc(uint32_t reg, uint32_t val);
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#endif
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int mv_pcib_bar_win_set(device_t dev, uint32_t base, uint32_t size,
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uint32_t remap, int winno, int busno);
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int mv_pcib_cpu_win_remap(device_t dev, uint32_t remap, uint32_t size);
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void mv_mask_endpoint_irq(uintptr_t nb, int unit);
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void mv_unmask_endpoint_irq(uintptr_t nb, int unit);
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int mv_drbl_get_next_irq(int dir, int unit);
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void mv_drbl_mask_all(int unit);
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void mv_drbl_mask_irq(uint32_t irq, int dir, int unit);
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void mv_drbl_unmask_irq(uint32_t irq, int dir, int unit);
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void mv_drbl_set_mask(uint32_t val, int dir, int unit);
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uint32_t mv_drbl_get_mask(int dir, int unit);
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void mv_drbl_set_cause(uint32_t val, int dir, int unit);
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uint32_t mv_drbl_get_cause(int dir, int unit);
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void mv_drbl_set_msg(uint32_t val, int mnr, int dir, int unit);
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uint32_t mv_drbl_get_msg(int mnr, int dir, int unit);
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int mv_msi_data(int irq, uint64_t *addr, uint32_t *data);
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#endif /* _MVVAR_H_ */
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