Konstantin Belousov e164cafc69 Add hw.dmar.batch_coalesce tunable/sysctl, which specifies rate at ...

which queued invalidation completion interrupt is requested with
regard to the queued invalidation requests.  In other words, setting
the value of the knob to N requests completion interrupt after N items
are processed.  Existing behaviour is restored by setting
hw.dmar.batch_coalesce=1.

The knob significantly decreases the DMAR qi interrupt rate at the
cost of slightly longer DMAR map entries recycling.

Sponsored by:	The FreeBSD Foundation

2016-04-17 10:56:56 +00:00

..

acpica

Deprecate using hints.acpi.0.rsdp to communicate the RSDP to the

2016-04-14 04:59:51 +00:00

bios

…

cpufreq

Cleanup unnecessary semicolons from the kernel.

2016-04-10 23:07:00 +00:00

include

Add x86 CPU features definitions published in the Intel SDM rev. 58.

2016-04-16 06:07:13 +00:00

iommu

Add hw.dmar.batch_coalesce tunable/sysctl, which specifies rate at

2016-04-17 10:56:56 +00:00

isa

Silence PVS-Studio warning (V595). It can never be NULL here.

2016-02-23 23:57:24 +00:00

pci

Convert rman to use rman_res_t instead of u_long

2016-01-27 02:23:54 +00:00

x86

Add x86 CPU features definitions published in the Intel SDM rev. 58.

2016-04-16 06:07:13 +00:00

xen

xen: Set ipi_{alloc,free} even for UP

2016-04-07 07:00:00 +00:00