8de1718b60
into threads each processing queue in a single domain. The structure of the pagedaemons and queues is kept intact, most of the changes come from the need for code to find an owning page queue for given page, calculated from the segment containing the page. The tie between NUMA domain and pagedaemon thread/pagequeue split is rather arbitrary, the multithreaded daemon could be allowed for the single-domain machines, or one domain might be split into several page domains, to further increase concurrency. Right now, each pagedaemon thread tries to reach the global target, precalculated at the start of the pass. This is not optimal, since it could cause excessive page deactivation and freeing. The code should be changed to re-check the global page deficit state in the loop after some number of iterations. The pagedaemons reach the quorum before starting the OOM, since one thread inability to meet the target is normal for split queues. Only when all pagedaemons fail to produce enough reusable pages, OOM is started by single selected thread. Launder is modified to take into account the segments layout with regard to the region for which cleaning is performed. Based on the preliminary patch by jeff, sponsored by EMC / Isilon Storage Division. Reviewed by: alc Tested by: pho Sponsored by: The FreeBSD Foundation
372 lines
9.6 KiB
C
372 lines
9.6 KiB
C
/*-
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* Copyright (c) 2010 Advanced Computing Technologies LLC
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* Written by: John H. Baldwin <jhb@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/smp.h>
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#include <sys/vmmeter.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_param.h>
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#include <vm/vm_page.h>
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#include <vm/vm_phys.h>
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#include <contrib/dev/acpica/include/acpi.h>
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#include <contrib/dev/acpica/include/actables.h>
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#include <machine/intr_machdep.h>
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#include <machine/apicvar.h>
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#include <dev/acpica/acpivar.h>
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#if MAXMEMDOM > 1
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struct cpu_info {
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int enabled:1;
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int has_memory:1;
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int domain;
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} cpus[MAX_APIC_ID + 1];
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struct mem_affinity mem_info[VM_PHYSSEG_MAX + 1];
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int num_mem;
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static ACPI_TABLE_SRAT *srat;
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static vm_paddr_t srat_physaddr;
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static void srat_walk_table(acpi_subtable_handler *handler, void *arg);
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/*
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* Returns true if a memory range overlaps with at least one range in
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* phys_avail[].
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*/
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static int
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overlaps_phys_avail(vm_paddr_t start, vm_paddr_t end)
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{
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int i;
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for (i = 0; phys_avail[i] != 0 && phys_avail[i + 1] != 0; i += 2) {
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if (phys_avail[i + 1] < start)
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continue;
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if (phys_avail[i] < end)
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return (1);
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break;
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}
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return (0);
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}
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static void
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srat_parse_entry(ACPI_SUBTABLE_HEADER *entry, void *arg)
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{
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ACPI_SRAT_CPU_AFFINITY *cpu;
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ACPI_SRAT_X2APIC_CPU_AFFINITY *x2apic;
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ACPI_SRAT_MEM_AFFINITY *mem;
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int domain, i, slot;
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switch (entry->Type) {
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case ACPI_SRAT_TYPE_CPU_AFFINITY:
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cpu = (ACPI_SRAT_CPU_AFFINITY *)entry;
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domain = cpu->ProximityDomainLo |
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cpu->ProximityDomainHi[0] << 8 |
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cpu->ProximityDomainHi[1] << 16 |
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cpu->ProximityDomainHi[2] << 24;
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if (bootverbose)
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printf("SRAT: Found CPU APIC ID %u domain %d: %s\n",
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cpu->ApicId, domain,
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(cpu->Flags & ACPI_SRAT_CPU_ENABLED) ?
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"enabled" : "disabled");
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if (!(cpu->Flags & ACPI_SRAT_CPU_ENABLED))
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break;
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KASSERT(!cpus[cpu->ApicId].enabled,
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("Duplicate local APIC ID %u", cpu->ApicId));
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cpus[cpu->ApicId].domain = domain;
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cpus[cpu->ApicId].enabled = 1;
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break;
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case ACPI_SRAT_TYPE_X2APIC_CPU_AFFINITY:
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x2apic = (ACPI_SRAT_X2APIC_CPU_AFFINITY *)entry;
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if (bootverbose)
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printf("SRAT: Found CPU APIC ID %u domain %d: %s\n",
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x2apic->ApicId, x2apic->ProximityDomain,
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(x2apic->Flags & ACPI_SRAT_CPU_ENABLED) ?
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"enabled" : "disabled");
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if (!(x2apic->Flags & ACPI_SRAT_CPU_ENABLED))
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break;
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KASSERT(!cpus[x2apic->ApicId].enabled,
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("Duplicate local APIC ID %u", x2apic->ApicId));
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cpus[x2apic->ApicId].domain = x2apic->ProximityDomain;
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cpus[x2apic->ApicId].enabled = 1;
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break;
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case ACPI_SRAT_TYPE_MEMORY_AFFINITY:
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mem = (ACPI_SRAT_MEM_AFFINITY *)entry;
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if (bootverbose)
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printf(
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"SRAT: Found memory domain %d addr %jx len %jx: %s\n",
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mem->ProximityDomain, (uintmax_t)mem->BaseAddress,
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(uintmax_t)mem->Length,
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(mem->Flags & ACPI_SRAT_MEM_ENABLED) ?
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"enabled" : "disabled");
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if (!(mem->Flags & ACPI_SRAT_MEM_ENABLED))
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break;
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if (!overlaps_phys_avail(mem->BaseAddress,
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mem->BaseAddress + mem->Length)) {
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printf("SRAT: Ignoring memory at addr %jx\n",
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(uintmax_t)mem->BaseAddress);
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break;
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}
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if (num_mem == VM_PHYSSEG_MAX) {
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printf("SRAT: Too many memory regions\n");
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*(int *)arg = ENXIO;
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break;
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}
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slot = num_mem;
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for (i = 0; i < num_mem; i++) {
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if (mem_info[i].end <= mem->BaseAddress)
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continue;
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if (mem_info[i].start <
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(mem->BaseAddress + mem->Length)) {
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printf("SRAT: Overlapping memory entries\n");
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*(int *)arg = ENXIO;
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return;
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}
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slot = i;
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}
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for (i = num_mem; i > slot; i--)
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mem_info[i] = mem_info[i - 1];
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mem_info[slot].start = mem->BaseAddress;
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mem_info[slot].end = mem->BaseAddress + mem->Length;
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mem_info[slot].domain = mem->ProximityDomain;
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num_mem++;
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break;
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}
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}
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/*
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* Ensure each memory domain has at least one CPU and that each CPU
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* has at least one memory domain.
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*/
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static int
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check_domains(void)
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{
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int found, i, j;
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for (i = 0; i < num_mem; i++) {
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found = 0;
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for (j = 0; j <= MAX_APIC_ID; j++)
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if (cpus[j].enabled &&
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cpus[j].domain == mem_info[i].domain) {
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cpus[j].has_memory = 1;
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found++;
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}
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if (!found) {
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printf("SRAT: No CPU found for memory domain %d\n",
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mem_info[i].domain);
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return (ENXIO);
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}
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}
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for (i = 0; i <= MAX_APIC_ID; i++)
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if (cpus[i].enabled && !cpus[i].has_memory) {
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printf("SRAT: No memory found for CPU %d\n", i);
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return (ENXIO);
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}
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return (0);
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}
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/*
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* Check that the SRAT memory regions cover all of the regions in
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* phys_avail[].
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*/
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static int
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check_phys_avail(void)
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{
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vm_paddr_t address;
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int i, j;
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/* j is the current offset into phys_avail[]. */
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address = phys_avail[0];
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j = 0;
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for (i = 0; i < num_mem; i++) {
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/*
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* Consume as many phys_avail[] entries as fit in this
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* region.
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*/
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while (address >= mem_info[i].start &&
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address <= mem_info[i].end) {
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/*
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* If we cover the rest of this phys_avail[] entry,
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* advance to the next entry.
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*/
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if (phys_avail[j + 1] <= mem_info[i].end) {
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j += 2;
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if (phys_avail[j] == 0 &&
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phys_avail[j + 1] == 0) {
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return (0);
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}
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address = phys_avail[j];
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} else
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address = mem_info[i].end + 1;
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}
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}
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printf("SRAT: No memory region found for %jx - %jx\n",
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(uintmax_t)phys_avail[j], (uintmax_t)phys_avail[j + 1]);
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return (ENXIO);
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}
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/*
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* Renumber the memory domains to be compact and zero-based if not
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* already. Returns an error if there are too many domains.
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*/
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static int
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renumber_domains(void)
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{
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int domains[VM_PHYSSEG_MAX];
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int i, j, slot;
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/* Enumerate all the domains. */
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vm_ndomains = 0;
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for (i = 0; i < num_mem; i++) {
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/* See if this domain is already known. */
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for (j = 0; j < vm_ndomains; j++) {
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if (domains[j] >= mem_info[i].domain)
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break;
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}
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if (j < vm_ndomains && domains[j] == mem_info[i].domain)
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continue;
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/* Insert the new domain at slot 'j'. */
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slot = j;
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for (j = vm_ndomains; j > slot; j--)
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domains[j] = domains[j - 1];
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domains[slot] = mem_info[i].domain;
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vm_ndomains++;
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if (vm_ndomains > MAXMEMDOM) {
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vm_ndomains = 1;
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printf("SRAT: Too many memory domains\n");
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return (EFBIG);
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}
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}
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/* Renumber each domain to its index in the sorted 'domains' list. */
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for (i = 0; i < vm_ndomains; i++) {
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/*
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* If the domain is already the right value, no need
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* to renumber.
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*/
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if (domains[i] == i)
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continue;
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/* Walk the cpu[] and mem_info[] arrays to renumber. */
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for (j = 0; j < num_mem; j++)
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if (mem_info[j].domain == domains[i])
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mem_info[j].domain = i;
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for (j = 0; j <= MAX_APIC_ID; j++)
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if (cpus[j].enabled && cpus[j].domain == domains[i])
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cpus[j].domain = i;
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}
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KASSERT(vm_ndomains > 0,
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("renumber_domains: invalid final vm_ndomains setup"));
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return (0);
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}
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/*
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* Look for an ACPI System Resource Affinity Table ("SRAT")
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*/
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static void
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parse_srat(void *dummy)
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{
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int error;
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if (resource_disabled("srat", 0))
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return;
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srat_physaddr = acpi_find_table(ACPI_SIG_SRAT);
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if (srat_physaddr == 0)
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return;
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/*
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* Make a pass over the table to populate the cpus[] and
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* mem_info[] tables.
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*/
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srat = acpi_map_table(srat_physaddr, ACPI_SIG_SRAT);
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error = 0;
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srat_walk_table(srat_parse_entry, &error);
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acpi_unmap_table(srat);
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srat = NULL;
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if (error || check_domains() != 0 || check_phys_avail() != 0 ||
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renumber_domains() != 0) {
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srat_physaddr = 0;
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return;
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}
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/* Point vm_phys at our memory affinity table. */
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mem_affinity = mem_info;
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}
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SYSINIT(parse_srat, SI_SUB_VM - 1, SI_ORDER_FIRST, parse_srat, NULL);
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static void
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srat_walk_table(acpi_subtable_handler *handler, void *arg)
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{
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acpi_walk_subtables(srat + 1, (char *)srat + srat->Header.Length,
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handler, arg);
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}
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/*
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* Setup per-CPU ACPI IDs.
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*/
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static void
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srat_set_cpus(void *dummy)
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{
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struct cpu_info *cpu;
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struct pcpu *pc;
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u_int i;
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if (srat_physaddr == 0)
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return;
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for (i = 0; i < MAXCPU; i++) {
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if (CPU_ABSENT(i))
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continue;
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pc = pcpu_find(i);
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KASSERT(pc != NULL, ("no pcpu data for CPU %u", i));
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cpu = &cpus[pc->pc_apic_id];
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if (!cpu->enabled)
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panic("SRAT: CPU with APIC ID %u is not known",
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pc->pc_apic_id);
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pc->pc_domain = cpu->domain;
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if (bootverbose)
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printf("SRAT: CPU %u has memory domain %d\n", i,
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cpu->domain);
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}
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}
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SYSINIT(srat_set_cpus, SI_SUB_CPU, SI_ORDER_ANY, srat_set_cpus, NULL);
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#endif /* MAXMEMDOM > 1 */
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