freebsd-skq/sys/mips/rmi/files.xlr
Randall Stewart eac3c4cd27 Ok With this commit we actually get through
the mi_startup (or to the last of it).. and
hit a panic after :

uart0: <16550 or compatible> on iodi0
Trap cause = 2 (TLB miss....)

I did have to take the pci bus OUT of the
build to get this far, hit a cache error with
the PCI code in. Interesting thing is the machine
reboots too ;-)
2009-11-06 12:52:51 +00:00

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# $FreeBSD$
#mips/rmi/xlr_boot1_console.c standard
mips/rmi/xlr_machdep.c standard
mips/rmi/clock.c standard
mips/rmi/tick.c standard
mips/rmi/iodi.c standard
mips/rmi/msgring.c standard
mips/rmi/msgring_xls.c standard
mips/rmi/board.c standard
mips/rmi/on_chip.c standard
mips/rmi/intr_machdep.c standard
mips/rmi/xlr_i2c.c optional iic
mips/rmi/uart_bus_xlr_iodi.c optional uart
mips/rmi/uart_cpu_mips_xlr.c optional uart
mips/rmi/perfmon_kern.c optional xlr_perfmon
mips/rmi/perfmon_percpu.c optional xlr_perfmon
#mips/rmi/pcibus.c optional pci
#mips/rmi/xlr_pci.c optional pci
#mips/rmi/xls_ehci.c optional usb ehci
dev/rmi/xlr/rge.c optional rge
mips/rmi/bus_space_rmi.c standard
dev/iicbus/xlr_rtc.c optional xlr_rtc
dev/iicbus/xlr_temperature.c optional xlr_temperature
dev/iicbus/xlr_eeprom.c optional xlr_eeprom
dev/rmi/sec/rmisec.c optional rmisec
dev/rmi/sec/rmilib.c optional rmisec