592ffb2175
Revert r338177, r338176, r338175, r338174, r338172 After long consultations with re@, core members and mmacy, revert these changes. Followup changes will be made to mark them as deprecated and prent a message about where to find the up-to-date driver. Followup commits will be made to make this clear in the installer. Followup commits to reduce POLA in ways we're still exploring. It's anticipated that after the freeze, this will be removed in 13-current (with the residual of the drm2 code copied to sys/arm/dev/drm2 for the TEGRA port's use w/o the intel or radeon drivers). Due to the impending freeze, there was no formal core vote for this. I've been talking to different core members all day, as well as Matt Macey and Glen Barber. Nobody is completely happy, all are grudgingly going along with this. Work is in progress to mitigate the negative effects as much as possible. Requested by: re@ (gjb, rgrimes)
228 lines
6.1 KiB
C
228 lines
6.1 KiB
C
/*-
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Gareth Hughes <gareth@valinux.com>
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/** @file ati_pcigart.c
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* Implementation of ATI's PCIGART, which provides an aperture in card virtual
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* address space with addresses remapped to system memory.
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*/
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#include "dev/drm/drmP.h"
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#define ATI_PCIGART_PAGE_SIZE 4096 /* PCI GART page size */
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#define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1))
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#define ATI_GART_NOSNOOP 0x1
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#define ATI_GART_WRITE 0x4
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#define ATI_GART_READ 0x8
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static void
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drm_ati_alloc_pcigart_table_cb(void *arg, bus_dma_segment_t *segs,
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int nsegs, int error)
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{
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struct drm_dma_handle *dmah = arg;
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if (error != 0)
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return;
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KASSERT(nsegs == 1,
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("drm_ati_alloc_pcigart_table_cb: bad dma segment count"));
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dmah->busaddr = segs[0].ds_addr;
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}
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static int
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drm_ati_alloc_pcigart_table(struct drm_device *dev,
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struct drm_ati_pcigart_info *gart_info)
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{
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struct drm_dma_handle *dmah;
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int flags, ret;
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dmah = malloc(sizeof(struct drm_dma_handle), DRM_MEM_DMA,
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M_ZERO | M_NOWAIT);
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if (dmah == NULL)
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return ENOMEM;
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DRM_UNLOCK();
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ret = bus_dma_tag_create(NULL, PAGE_SIZE, 0, /* tag, align, boundary */
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gart_info->table_mask, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */
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NULL, NULL, /* filtfunc, filtfuncargs */
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gart_info->table_size, 1, /* maxsize, nsegs */
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gart_info->table_size, /* maxsegsize */
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0, NULL, NULL, /* flags, lockfunc, lockfuncargs */
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&dmah->tag);
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if (ret != 0) {
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free(dmah, DRM_MEM_DMA);
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return ENOMEM;
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}
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flags = BUS_DMA_WAITOK | BUS_DMA_ZERO;
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if (gart_info->gart_reg_if == DRM_ATI_GART_IGP)
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flags |= BUS_DMA_NOCACHE;
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ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr, flags, &dmah->map);
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if (ret != 0) {
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bus_dma_tag_destroy(dmah->tag);
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free(dmah, DRM_MEM_DMA);
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return ENOMEM;
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}
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DRM_LOCK();
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ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr,
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gart_info->table_size, drm_ati_alloc_pcigart_table_cb, dmah,
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BUS_DMA_NOWAIT);
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if (ret != 0) {
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bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
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bus_dma_tag_destroy(dmah->tag);
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free(dmah, DRM_MEM_DMA);
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return ENOMEM;
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}
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gart_info->dmah = dmah;
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return 0;
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}
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static void
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drm_ati_free_pcigart_table(struct drm_device *dev,
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struct drm_ati_pcigart_info *gart_info)
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{
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struct drm_dma_handle *dmah = gart_info->dmah;
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bus_dmamap_unload(dmah->tag, dmah->map);
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bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
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bus_dma_tag_destroy(dmah->tag);
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free(dmah, DRM_MEM_DMA);
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gart_info->dmah = NULL;
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}
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int
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drm_ati_pcigart_cleanup(struct drm_device *dev,
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struct drm_ati_pcigart_info *gart_info)
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{
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/* we need to support large memory configurations */
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if (dev->sg == NULL) {
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DRM_ERROR("no scatter/gather memory!\n");
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return 0;
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}
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if (gart_info->bus_addr) {
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if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
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gart_info->bus_addr = 0;
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if (gart_info->dmah)
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drm_ati_free_pcigart_table(dev, gart_info);
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}
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}
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return 1;
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}
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int
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drm_ati_pcigart_init(struct drm_device *dev,
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struct drm_ati_pcigart_info *gart_info)
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{
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void *address = NULL;
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unsigned long pages;
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u32 *pci_gart, page_base;
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dma_addr_t bus_address = 0;
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dma_addr_t entry_addr;
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int i, j, ret = 0;
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int max_pages;
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/* we need to support large memory configurations */
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if (dev->sg == NULL) {
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DRM_ERROR("no scatter/gather memory!\n");
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goto done;
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}
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if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
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DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
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ret = drm_ati_alloc_pcigart_table(dev, gart_info);
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if (ret) {
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DRM_ERROR("cannot allocate PCI GART page!\n");
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goto done;
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}
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address = (void *)gart_info->dmah->vaddr;
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bus_address = gart_info->dmah->busaddr;
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} else {
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address = gart_info->addr;
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bus_address = gart_info->bus_addr;
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DRM_DEBUG("PCI: Gart Table: VRAM %08X mapped at %08lX\n",
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(unsigned int)bus_address, (unsigned long)address);
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}
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pci_gart = (u32 *) address;
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max_pages = (gart_info->table_size / sizeof(u32));
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pages = (dev->sg->pages <= max_pages)
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? dev->sg->pages : max_pages;
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memset(pci_gart, 0, max_pages * sizeof(u32));
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KASSERT(PAGE_SIZE >= ATI_PCIGART_PAGE_SIZE, ("page size too small"));
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for (i = 0; i < pages; i++) {
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entry_addr = dev->sg->busaddr[i];
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for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
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page_base = (u32) entry_addr & ATI_PCIGART_PAGE_MASK;
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switch(gart_info->gart_reg_if) {
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case DRM_ATI_GART_IGP:
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page_base |=
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(upper_32_bits(entry_addr) & 0xff) << 4;
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page_base |= ATI_GART_READ | ATI_GART_WRITE;
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page_base |= ATI_GART_NOSNOOP;
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break;
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case DRM_ATI_GART_PCIE:
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page_base >>= 8;
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page_base |=
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(upper_32_bits(entry_addr) & 0xff) << 24;
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page_base |= ATI_GART_READ | ATI_GART_WRITE;
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page_base |= ATI_GART_NOSNOOP;
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break;
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default:
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case DRM_ATI_GART_PCI:
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break;
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}
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*pci_gart = cpu_to_le32(page_base);
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pci_gart++;
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entry_addr += ATI_PCIGART_PAGE_SIZE;
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}
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}
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ret = 1;
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done:
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gart_info->addr = address;
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gart_info->bus_addr = bus_address;
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return ret;
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}
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