371 lines
9.6 KiB
C
371 lines
9.6 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD AND BSD-2-Clause-NetBSD
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*
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* Copyright (c) 2012 Yusuke Tanaka
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 2011 Frank Wille.
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* All rights reserved.
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*
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* Written by Frank Wille for The NetBSD Project.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Driver for Seiko Instruments S-35390A Real-time Clock
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*/
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/clock.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <dev/iicbus/iicbus.h>
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#include <dev/iicbus/iiconf.h>
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#ifdef FDT
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#endif
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#include "clock_if.h"
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#include "iicbus_if.h"
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#define S390_DEVNAME "s35390a_rtc"
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#define S390_DEVCODE 0x6 /* 0110 */
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/*
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* S-35390A uses 4-bit device code + 3-bit command in the slave address
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* field. The possible combination is 0x60-0x6f including the R/W bit.
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* 0x60 means an write access to status register 1.
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*/
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#define S390_ADDR (S390_DEVCODE << 4)
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/* Registers are encoded into the slave address */
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#define S390_STATUS1 (0 << 1)
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#define S390_STATUS2 (1 << 1)
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#define S390_REALTIME1 (2 << 1)
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#define S390_REALTIME2 (3 << 1)
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#define S390_INT1_1 (4 << 1)
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#define S390_INT1_2 (5 << 1)
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#define S390_CLOCKADJ (6 << 1)
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#define S390_FREE (7 << 1)
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/* Status1 bits */
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#define S390_ST1_POC (1 << 7)
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#define S390_ST1_BLD (1 << 6)
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#define S390_ST1_24H (1 << 1)
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#define S390_ST1_RESET (1 << 0)
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/* Status2 bits */
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#define S390_ST2_TEST (1 << 7)
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/* Realtime1 data bytes */
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#define S390_RT1_NBYTES 7
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#define S390_RT1_YEAR 0
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#define S390_RT1_MONTH 1
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#define S390_RT1_DAY 2
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#define S390_RT1_WDAY 3
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#define S390_RT1_HOUR 4
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#define S390_RT1_MINUTE 5
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#define S390_RT1_SECOND 6
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struct s390rtc_softc {
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device_t sc_dev;
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uint16_t sc_addr;
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};
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/*
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* S-35390A interprets bits in each byte on SDA in reverse order.
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* bitreverse() reverses the bits in uint8_t.
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*/
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static const uint8_t nibbletab[] = {
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/* 0x0 0000 -> 0000 */ 0x0,
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/* 0x1 0001 -> 1000 */ 0x8,
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/* 0x2 0010 -> 0100 */ 0x4,
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/* 0x3 0011 -> 1100 */ 0xc,
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/* 0x4 0100 -> 0010 */ 0x2,
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/* 0x5 0101 -> 1010 */ 0xa,
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/* 0x6 0110 -> 0110 */ 0x6,
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/* 0x7 0111 -> 1110 */ 0xe,
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/* 0x8 1000 -> 0001 */ 0x1,
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/* 0x9 1001 -> 1001 */ 0x9,
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/* 0xa 1010 -> 0101 */ 0x5,
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/* 0xb 1011 -> 1101 */ 0xd,
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/* 0xc 1100 -> 0011 */ 0x3,
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/* 0xd 1101 -> 1011 */ 0xb,
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/* 0xe 1110 -> 0111 */ 0x7,
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/* 0xf 1111 -> 1111 */ 0xf, };
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static uint8_t
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bitreverse(uint8_t x)
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{
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return (nibbletab[x & 0xf] << 4) | nibbletab[x >> 4];
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}
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static int
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s390rtc_read(device_t dev, uint8_t reg, uint8_t *buf, size_t len)
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{
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struct s390rtc_softc *sc = device_get_softc(dev);
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struct iic_msg msg[] = {
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{
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.slave = sc->sc_addr | reg,
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.flags = IIC_M_RD,
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.len = len,
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.buf = buf,
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},
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};
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int i;
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int error;
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error = iicbus_transfer_excl(dev, msg, 1, IIC_WAIT);
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if (error)
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return (error);
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/* this chip returns each byte in reverse order */
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for (i = 0; i < len; ++i)
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buf[i] = bitreverse(buf[i]);
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return (0);
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}
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static int
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s390rtc_write(device_t dev, uint8_t reg, uint8_t *buf, size_t len)
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{
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struct s390rtc_softc *sc = device_get_softc(dev);
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struct iic_msg msg[] = {
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{
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.slave = sc->sc_addr | reg,
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.flags = IIC_M_WR,
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.len = len,
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.buf = buf,
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},
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};
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int i;
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/* this chip expects each byte in reverse order */
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for (i = 0; i < len; ++i)
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buf[i] = bitreverse(buf[i]);
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return (iicbus_transfer_excl(dev, msg, 1, IIC_WAIT));
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}
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static int
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s390rtc_probe(device_t dev)
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{
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#ifdef FDT
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "sii,s35390a"))
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return (ENXIO);
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#else
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if (iicbus_get_addr(dev) != S390_ADDR) {
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if (bootverbose)
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device_printf(dev, "slave address mismatch. "
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"(%02x != %02x)\n", iicbus_get_addr(dev),
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S390_ADDR);
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return (ENXIO);
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}
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#endif
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device_set_desc(dev, "Seiko Instruments S-35390A RTC");
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return (BUS_PROBE_DEFAULT);
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}
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static void
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s390rtc_start(void *arg)
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{
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device_t dev;
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uint8_t reg;
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int error;
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dev = arg;
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/* Reset the chip and turn on 24h mode, after power-off or battery. */
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error = s390rtc_read(dev, S390_STATUS1, ®, 1);
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if (error) {
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device_printf(dev, "%s: cannot read status1 register\n",
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__func__);
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return;
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}
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if (reg & (S390_ST1_POC | S390_ST1_BLD)) {
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reg |= S390_ST1_24H | S390_ST1_RESET;
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error = s390rtc_write(dev, S390_STATUS1, ®, 1);
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if (error) {
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device_printf(dev,
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"%s: cannot initialize\n", __func__);
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return;
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}
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}
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/* Disable the test mode, when enabled. */
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error = s390rtc_read(dev, S390_STATUS2, ®, 1);
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if (error) {
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device_printf(dev, "%s: cannot read status2 register\n",
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__func__);
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return;
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}
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if (reg & S390_ST2_TEST) {
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reg &= ~S390_ST2_TEST;
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error = s390rtc_write(dev, S390_STATUS2, ®, 1);
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if (error) {
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device_printf(dev,
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"%s: cannot disable the test mode\n", __func__);
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return;
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}
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}
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clock_register(dev, 1000000); /* 1 second resolution */
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}
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static int
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s390rtc_attach(device_t dev)
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{
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struct s390rtc_softc *sc;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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sc->sc_addr = iicbus_get_addr(dev);
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config_intrhook_oneshot(s390rtc_start, dev);
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return (0);
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}
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static int
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s390rtc_detach(device_t dev)
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{
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clock_unregister(dev);
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return (0);
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}
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static int
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s390rtc_gettime(device_t dev, struct timespec *ts)
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{
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uint8_t bcd[S390_RT1_NBYTES];
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struct bcd_clocktime bct;
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int error;
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error = s390rtc_read(dev, S390_REALTIME1, bcd, S390_RT1_NBYTES);
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if (error) {
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device_printf(dev, "%s: cannot read realtime1 register\n",
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__func__);
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return (error);
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}
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/*
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* Convert the register values into something useable.
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*/
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bct.nsec = 0;
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bct.sec = bcd[S390_RT1_SECOND];
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bct.min = bcd[S390_RT1_MINUTE];
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bct.hour = bcd[S390_RT1_HOUR] & 0x3f;
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bct.day = bcd[S390_RT1_DAY];
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bct.dow = bcd[S390_RT1_WDAY] & 0x07;
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bct.mon = bcd[S390_RT1_MONTH];
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bct.year = bcd[S390_RT1_YEAR];
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clock_dbgprint_bcd(dev, CLOCK_DBG_READ, &bct);
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return (clock_bcd_to_ts(&bct, ts, false));
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}
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static int
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s390rtc_settime(device_t dev, struct timespec *ts)
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{
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uint8_t bcd[S390_RT1_NBYTES];
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struct bcd_clocktime bct;
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clock_ts_to_bcd(ts, &bct, false);
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clock_dbgprint_bcd(dev, CLOCK_DBG_WRITE, &bct);
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/*
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* Convert our time representation into something the S-xx390
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* can understand.
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*/
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bcd[S390_RT1_SECOND] = bct.sec;
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bcd[S390_RT1_MINUTE] = bct.min;
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bcd[S390_RT1_HOUR] = bct.hour;
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bcd[S390_RT1_DAY] = bct.day;
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bcd[S390_RT1_WDAY] = bct.dow;
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bcd[S390_RT1_MONTH] = bct.mon;
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bcd[S390_RT1_YEAR] = bct.year & 0xff;
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return (s390rtc_write(dev, S390_REALTIME1, bcd, S390_RT1_NBYTES));
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}
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static device_method_t s390rtc_methods[] = {
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DEVMETHOD(device_probe, s390rtc_probe),
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DEVMETHOD(device_attach, s390rtc_attach),
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DEVMETHOD(device_detach, s390rtc_detach),
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DEVMETHOD(clock_gettime, s390rtc_gettime),
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DEVMETHOD(clock_settime, s390rtc_settime),
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DEVMETHOD_END
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};
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static driver_t s390rtc_driver = {
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S390_DEVNAME,
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s390rtc_methods,
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sizeof(struct s390rtc_softc),
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};
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static devclass_t s390rtc_devclass;
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DRIVER_MODULE(s35390a, iicbus, s390rtc_driver, s390rtc_devclass, NULL, NULL);
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MODULE_VERSION(s35390a, 1);
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MODULE_DEPEND(s35390a, iicbus, 1, 1, 1);
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