99928843b9
These are fixed resolution and operate only in pixel mode so they present a challenge to syscons (square peg, round hole, etc, etc). The driver provides a video driver interface for syscons and a separate character device for X to mmap. Wherever possible the creator's accelarated graphics functions are used so text mode is very fast. Based roughly on the openbsd driver.
172 lines
5.4 KiB
C
172 lines
5.4 KiB
C
/*-
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* Copyright (c) 2003 Jake Burkholder.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _DEV_FB_CREATOR_H_
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#define _DEV_FB_CREATOR_H_
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#define FFB_NREG 24
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#define FFB_DAC 1
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#define FFB_DAC_TYPE 0x0
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#define FFB_DAC_VALUE 0x4
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#define FFB_DAC_TYPE2 0x8
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#define FFB_DAC_VALUE2 0xc
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#define FFB_FBC 2
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#define FFB_FBC_BY 0x60
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#define FFB_FBC_BX 0x64
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#define FFB_FBC_DY 0x68
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#define FFB_FBC_DX 0x6c
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#define FFB_FBC_BH 0x70
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#define FFB_FBC_BW 0x74
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#define FFB_FBC_PPC 0x200 /* Pixel Processor Control */
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#define FFB_FBC_FG 0x208 /* Foreground */
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#define FFB_FBC_BG 0x20c /* Background */
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#define FFB_FBC_FBC 0x254 /* Frame Buffer Control */
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#define FFB_FBC_ROP 0x258 /* Raster Operation */
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#define FFB_FBC_PMASK 0x290 /* Pixel Mask */
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#define FFB_FBC_DRAWOP 0x300 /* Draw Operation */
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#define FFB_FBC_FONTXY 0x314 /* Font X/Y */
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#define FFB_FBC_FONTW 0x318 /* Font Width */
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#define FFB_FBC_FONTINC 0x31c /* Font Increment */
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#define FFB_FBC_FONT 0x320 /* Font Data */
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#define FFB_FBC_UCSR 0x900 /* User Control & Status */
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#define FBC_PPC_VCE_DIS 0x00001000
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#define FBC_PPC_APE_DIS 0x00000800
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#define FBC_PPC_TBE_OPAQUE 0x00000200
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#define FBC_PPC_CS_CONST 0x00000003
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#define FFB_FBC_WB_A 0x20000000
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#define FFB_FBC_RB_A 0x00004000
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#define FFB_FBC_SB_BOTH 0x00003000
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#define FFB_FBC_XE_OFF 0x00000040
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#define FFB_FBC_RGBE_MASK 0x0000003f
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#define FBC_ROP_NEW 0x83
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#define FBC_DRAWOP_RECTANGLE 0x08
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#define FBC_UCSR_FIFO_OVFL 0x80000000
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#define FBC_UCSR_READ_ERR 0x40000000
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#define FBC_UCSR_RP_BUSY 0x02000000
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#define FBC_UCSR_FB_BUSY 0x01000000
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#define FBC_UCSR_FIFO_MASK 0x00000fff
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#define FFB_VIRT_SFB8R 0x00000000
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#define FFB_VIRT_SFB8G 0x00400000
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#define FFB_VIRT_SFB8B 0x00800000
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#define FFB_VIRT_SFB8X 0x00c00000
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#define FFB_VIRT_SFB32 0x01000000
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#define FFB_VIRT_SFB64 0x02000000
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#define FFB_VIRT_FBC 0x04000000
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#define FFB_VIRT_FBC_BM 0x04002000
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#define FFB_VIRT_DFB8R 0x04004000
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#define FFB_VIRT_DFB8G 0x04404000
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#define FFB_VIRT_DFB8B 0x04804000
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#define FFB_VIRT_DFB8X 0x04c04000
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#define FFB_VIRT_DFB24 0x05004000
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#define FFB_VIRT_DFB32 0x06004000
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#define FFB_VIRT_DFB422A 0x07004000
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#define FFB_VIRT_DFB422AD 0x07804000
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#define FFB_VIRT_DFB24B 0x08004000
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#define FFB_VIRT_DFB422B 0x09004000
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#define FFB_VIRT_DFB422BD 0x09804000
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#define FFB_VIRT_SFB16Z 0x0a004000
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#define FFB_VIRT_SFB8Z 0x0a404000
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#define FFB_VIRT_SFB422 0x0ac04000
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#define FFB_VIRT_SFB422D 0x0b404000
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#define FFB_VIRT_FBC_KREG 0x0bc04000
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#define FFB_VIRT_DAC 0x0bc06000
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#define FFB_VIRT_PROM 0x0bc08000
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#define FFB_VIRT_EXP 0x0bc18000
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#define FFB_PHYS_SFB8R 0x04000000
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#define FFB_PHYS_SFB8G 0x04400000
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#define FFB_PHYS_SFB8B 0x04800000
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#define FFB_PHYS_SFB8X 0x04c00000
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#define FFB_PHYS_SFB32 0x05000000
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#define FFB_PHYS_SFB64 0x06000000
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#define FFB_PHYS_FBC 0x00600000
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#define FFB_PHYS_FBC_BM 0x00600000
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#define FFB_PHYS_DFB8R 0x01000000
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#define FFB_PHYS_DFB8G 0x01400000
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#define FFB_PHYS_DFB8B 0x01800000
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#define FFB_PHYS_DFB8X 0x01c00000
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#define FFB_PHYS_DFB24 0x02000000
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#define FFB_PHYS_DFB32 0x03000000
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#define FFB_PHYS_DFB422A 0x09000000
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#define FFB_PHYS_DFB422AD 0x09800000
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#define FFB_PHYS_DFB24B 0x0a000000
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#define FFB_PHYS_DFB422B 0x0b000000
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#define FFB_PHYS_DFB422BD 0x0b800000
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#define FFB_PHYS_SFB16Z 0x0c800000
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#define FFB_PHYS_SFB8Z 0x0c000000
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#define FFB_PHYS_SFB422 0x0d000000
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#define FFB_PHYS_SFB422D 0x0d800000
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#define FFB_PHYS_FBC_KREG 0x00610000
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#define FFB_PHYS_DAC 0x00400000
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#define FFB_PHYS_PROM 0x00000000
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#define FFB_PHYS_EXP 0x00200000
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#define FFB_READ(sc, reg, off) \
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bus_space_read_4((sc)->sc_bt[(reg)], (sc)->sc_bh[(reg)], (off))
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#define FFB_WRITE(sc, reg, off, val) \
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bus_space_write_4((sc)->sc_bt[(reg)], (sc)->sc_bh[(reg)], (off), (val))
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struct creator_softc {
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video_adapter_t sc_va; /* XXX must be first */
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dev_t sc_si;
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struct resource *sc_reg[FFB_NREG];
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bus_space_tag_t sc_bt[FFB_NREG];
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bus_space_handle_t sc_bh[FFB_NREG];
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char sc_model[32];
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int sc_console;
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int sc_dac;
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int sc_height;
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int sc_width;
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int sc_ncol;
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int sc_nrow;
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int sc_xmargin;
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int sc_ymargin;
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u_char *sc_font;
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int *sc_rowp;
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int *sc_colp;
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int sc_bg_cache;
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int sc_fg_cache;
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int sc_fifo_cache;
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};
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#endif
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