freebsd-skq/usr.sbin/bhyve/Makefile
John Baldwin 3cbf3585cb Enhance the support for PCI legacy INTx interrupts and enable them in
the virtio backends.
- Add a new ioctl to export the count of pins on the I/O APIC from vmm
  to the hypervisor.
- Use pins on the I/O APIC >= 16 for PCI interrupts leaving 0-15 for
  ISA interrupts.
- Populate the MP Table with I/O interrupt entries for any PCI INTx
  interrupts.
- Create a _PRT table under the PCI root bridge in ACPI to route any
  PCI INTx interrupts appropriately.
- Track which INTx interrupts are in use per-slot so that functions
  that share a slot attempt to distribute their INTx interrupts across
  the four available pins.
- Implicitly mask INTx interrupts if either MSI or MSI-X is enabled
  and when the INTx DIS bit is set in a function's PCI command register.
  Either assert or deassert the associated I/O APIC pin when the
  state of one of those conditions changes.
- Add INTx support to the virtio backends.
- Always advertise the MSI capability in the virtio backends.

Submitted by:	neel (7)
Reviewed by:	neel
MFC after:	2 weeks
2014-01-29 14:56:48 +00:00

51 lines
685 B
Makefile

#
# $FreeBSD$
#
PROG= bhyve
DEBUG_FLAGS= -g -O0
MAN= bhyve.8
SRCS= \
acpi.c \
atpic.c \
bhyverun.c \
block_if.c \
consport.c \
dbgport.c \
elcr.c \
inout.c \
ioapic.c \
mem.c \
mevent.c \
mptbl.c \
pci_ahci.c \
pci_emul.c \
pci_hostbridge.c \
pci_lpc.c \
pci_passthru.c \
pci_virtio_block.c \
pci_virtio_net.c \
pci_uart.c \
pit_8254.c \
pm.c \
pmtmr.c \
post.c \
rtc.c \
uart_emul.c \
virtio.c \
xmsr.c \
spinup_ap.c
.PATH: ${.CURDIR}/../../sys/amd64/vmm
SRCS+= vmm_instruction_emul.c
DPADD= ${LIBVMMAPI} ${LIBMD} ${LIBUTIL} ${LIBPTHREAD}
LDADD= -lvmmapi -lmd -lutil -lpthread
WARNS?= 2
.include <bsd.prog.mk>