e9d76762b9
Freescale uses eSDHC in both i.MX (ARM) and QorIQ (PowerPC), with slight differences. This is part one in unifying the drivers. Reviewed by: imp
55 lines
1.3 KiB
Plaintext
55 lines
1.3 KiB
Plaintext
# $FreeBSD$
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kern/kern_clocksource.c standard
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# Init
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arm/freescale/imx/imx_common.c standard
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arm/freescale/imx/imx_machdep.c standard
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arm/freescale/imx/imx51_machdep.c optional soc_imx51
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arm/freescale/imx/imx53_machdep.c optional soc_imx53
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# Special serial console for debuging early boot code
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#arm/freescale/imx/console.c standard
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# UART driver (includes serial console support)
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dev/uart/uart_dev_imx.c optional uart
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# TrustZone Interrupt Controller
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arm/freescale/imx/tzic.c standard
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# IOMUX - external pins multiplexor
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arm/freescale/imx/imx_iomux.c standard
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# GPIO
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arm/freescale/imx/imx_gpio.c optional gpio
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# Generic Periodic Timer
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arm/freescale/imx/imx_gpt.c standard
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# Clock Configuration Manager
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arm/freescale/imx/imx51_ccm.c standard
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# i.MX5xx PATA controller
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dev/ata/chipsets/ata-fsl.c optional imxata
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# SDHCI/MMC
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dev/sdhci/fsl_sdhci.c optional sdhci
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# USB OH3 controller (1 OTG, 3 EHCI)
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arm/freescale/imx/imx_nop_usbphy.c optional ehci
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dev/usb/controller/ehci_imx.c optional ehci
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# Watchdog
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arm/freescale/imx/imx_wdog.c optional imxwdt
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# i2c
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arm/freescale/imx/imx_i2c.c optional fsliic
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# IPU - Image Processing Unit (frame buffer also)
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arm/freescale/imx/imx51_ipuv3.c optional sc
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arm/freescale/imx/imx51_ipuv3_fbd.c optional vt
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dev/vt/hw/fb/vt_early_fb.c optional vt
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# Fast Ethernet Controller
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dev/ffec/if_ffec.c optional ffec
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