2c2cf82dde
This code reads the PLL configuration registers and correctly programs things so the UART and such can come up. There's MIPS74k platform issues that need fixing; but this at least brings things up enough to echo stuff out the serial port and allow for interactive debugging with ddb. Tested: * AR71xx SoCs * AR933x SoC * AR9344 board (DB120) Obtained from: Qualcomm Atheros; Linux/OpenWRT
32 lines
1.2 KiB
Plaintext
32 lines
1.2 KiB
Plaintext
# $FreeBSD$
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mips/atheros/apb.c standard
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mips/atheros/ar71xx_gpio.c optional gpio
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mips/atheros/ar71xx_machdep.c standard
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mips/atheros/ar71xx_ehci.c optional ehci
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mips/atheros/ar71xx_ohci.c optional ohci
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mips/atheros/ar71xx_pci.c optional ar71xx_pci pci
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mips/atheros/ar724x_pci.c optional ar724x_pci pci
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mips/atheros/ar71xx_pci_bus_space.c optional pci
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mips/atheros/ar71xx_spi.c optional ar71xx_spi
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mips/atheros/pcf2123_rtc.c optional pcf2123_rtc ar71xx_spi
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mips/atheros/ar71xx_wdog.c optional ar71xx_wdog
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mips/atheros/if_arge.c optional arge
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mips/atheros/uart_bus_ar71xx.c optional uart_ar71xx
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mips/atheros/uart_cpu_ar71xx.c optional uart_ar71xx
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mips/atheros/uart_bus_ar933x.c optional uart_ar933x
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mips/atheros/uart_cpu_ar933x.c optional uart_ar933x
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mips/atheros/uart_dev_ar933x.c optional uart_ar933x
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mips/atheros/ar71xx_bus_space_reversed.c standard
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mips/mips/intr_machdep.c standard
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mips/mips/tick.c standard
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mips/atheros/ar71xx_setup.c standard
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mips/atheros/ar71xx_chip.c standard
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mips/atheros/ar724x_chip.c standard
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mips/atheros/ar91xx_chip.c standard
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mips/atheros/ar933x_chip.c standard
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mips/atheros/ar934x_chip.c standard
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mips/atheros/ar71xx_fixup.c optional ar71xx_ath_eeprom
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dev/hwpmc/hwpmc_mips24k.c optional hwpmc_mips24k
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