3ade944019
Apparently AMD machines cannot tolerate this. This was uncovered by r339386, where cache flush started really flushing the requested range. Introduce pmap_mapdev_pciecfg(), which simply does not flush cache comparing with pmap_mapdev(). It assumes that the MCFG region was never accessed through the cacheable mapping, which is most likely true for machine to boot at all. Note that i386 does not need the change, since the architecture handles access per-page due to the KVA shortage, and page remapping already does not flush the cache. Reported and tested by: mjg, Mike Tancsa <mike@sentex.net> Reviewed by: alc Sponsored by: The FreeBSD Foundation Approved by: re (gjb) MFC after: 2 weeks Differential revision: https://reviews.freebsd.org/D17612
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