5fcbea6e19
distribution to a MI header so it can be shared with other architectures.
123 lines
3.8 KiB
C
123 lines
3.8 KiB
C
/*-
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* Copyright (c) 2001 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MADT_H_
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#define _MADT_H_
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#pragma pack(1)
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#define APIC_INTERRUPT_SOURCE_OVERRIDE 2
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#define APIC_NMI 3
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#define APIC_LOCAL_APIC_NMI 4
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#define APIC_LOCAL_APIC_OVERRIDE 5
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#define APIC_IO_SAPIC 6
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#define APIC_LOCAL_SAPIC 7
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#define APIC_PLATFORM_INTERRUPT 8
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#define APIC_POLARITY_CONFORM 0
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#define APIC_POLARITY_ACTIVEHI 1
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#define APIC_POLARITY_ACTIVELO 3
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#define APIC_TRIGGER_CONFORM 0
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#define APIC_TRIGGER_EDGE 1
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#define APIC_TRIGGER_LEVEL 3
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typedef struct /* Interrupt Source Override */
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{
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APIC_HEADER Header;
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UINT8 Bus;
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UINT8 Source;
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UINT32 GlobalSystemInterrupt;
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UINT16 Polarity : 2; /* Polarity of input signal */
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UINT16 TriggerMode: 2; /* Trigger mode of input signal */
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UINT16 Reserved1 : 12;
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} INTERRUPT_SOURCE_OVERRIDE;
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typedef struct /* NMI */
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{
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APIC_HEADER Header;
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UINT16 Polarity : 2; /* Polarity of input signal */
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UINT16 TriggerMode: 2; /* Trigger mode of input signal */
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UINT16 Reserved1 : 12;
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UINT32 GlobalSystemInterrupt;
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} NMI;
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typedef struct /* LOCAL APIC NMI */
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{
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APIC_HEADER Header;
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UINT8 ProcessorApicId; /* ACPI processor id */
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UINT16 Polarity : 2; /* Polarity of input signal */
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UINT16 TriggerMode: 2; /* Trigger mode of input signal */
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UINT16 Reserved1 : 12;
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UINT8 LINTPin;
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} LAPIC_NMI;
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typedef struct /* LOCAL APIC OVERRIDE */
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{
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APIC_HEADER Header;
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UINT16 Reserved;
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UINT64 LocalApicAddress;
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} LAPIC_OVERRIDE;
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typedef struct /* IO SAPIC */
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{
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APIC_HEADER Header;
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UINT8 IoSapicId; /* I/O SAPIC ID */
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UINT8 Reserved; /* reserved - must be zero */
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UINT32 Vector; /* interrupt base */
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UINT64 IoSapicAddress; /* SAPIC's physical address */
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} IO_SAPIC;
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typedef struct /* LOCAL SAPIC */
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{
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APIC_HEADER Header;
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UINT8 ProcessorId; /* ACPI processor id */
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UINT8 LocalSapicId; /* Processor local SAPIC id */
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UINT8 LocalSapicEid; /* Processor local SAPIC eid */
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UINT8 Reserved[3];
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UINT32 ProcessorEnabled: 1;
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UINT32 FlagsReserved: 31;
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} LOCAL_SAPIC;
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typedef struct /* PLATFORM INTERRUPT SOURCE */
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{
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APIC_HEADER Header;
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UINT16 Polarity : 2; /* Polarity of input signal */
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UINT16 TriggerMode: 2; /* Trigger mode of input signal */
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UINT16 Reserved1 : 12;
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UINT8 InterruptType; /* 1-PMI, 2-INIT, 3-Error */
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UINT8 ProcessorId; /* Processor ID of destination */
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UINT8 ProcessorEid; /* Processor EID of destination */
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UINT8 IoSapicVector; /* Value for redirection table */
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UINT32 GlobalSystemInterrupt; /* Global System Interrupt */
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UINT32 Reserved2;
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} PLATFORM_INTERRUPT_SOURCE;
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#pragma pack()
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#endif /* !_MADT_H_ */
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