40c4c3de40
Summary: The Freescale e500v2 PowerPC core does not use a standard FPU. Instead, it uses a Signal Processing Engine (SPE)--a DSP-style vector processor unit, which doubles as a FPU. The PowerPC SPE ABI is incompatible with the stock powerpc ABI, so a new MACHINE_ARCH was created to deal with this. Additionaly, the SPE opcodes overlap with Altivec, so these are mutually exclusive. Taking advantage of this fact, a new file, powerpc/booke/spe.c, was created with the same function set as in powerpc/powerpc/altivec.c, so it becomes effectively a drop-in replacement. setjmp/longjmp were modified to save the upper 32-bits of the now-64-bit GPRs (upper 32-bits are only accessible by the SPE). Note: This does _not_ support the SPE in the e500v1, as the e500v1 SPE does not support double-precision floating point. Also, without a new MACHINE_ARCH it would be impossible to provide binary packages which utilize the SPE. Additionally, no work has been done to support ports, work is needed for this. This also means no newer gcc can yet be used. However, gcc's powerpc support has been refactored which would make adding a powerpcspe-freebsd target very easy. Test Plan: This was lightly tested on a RouterBoard RB800 and an AmigaOne A1222 (P1022-based) board, compiled against the new ABI. Base system utilities (/bin/sh, /bin/ls, etc) still function appropriately, the system is able to boot multiuser. Reviewed By: bdrewery, imp Relnotes: yes Differential Revision: https://reviews.freebsd.org/D5683
426 lines
12 KiB
C
426 lines
12 KiB
C
/*-
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* Copyright (C) 2006-2012 Semihalf
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (C) 2001 Benno Rice
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $
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*/
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/*-
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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* Copyright (C) 1995, 1996 TooLs GmbH.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by TooLs GmbH.
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* 4. The name of TooLs GmbH may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_compat.h"
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#include "opt_ddb.h"
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#include "opt_hwpmc_hooks.h"
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#include "opt_kstack_pages.h"
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/proc.h>
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#include <sys/systm.h>
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#include <sys/time.h>
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#include <sys/bio.h>
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#include <sys/buf.h>
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#include <sys/bus.h>
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#include <sys/cons.h>
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#include <sys/cpu.h>
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#include <sys/kdb.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/rwlock.h>
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#include <sys/sysctl.h>
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#include <sys/exec.h>
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#include <sys/ktr.h>
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#include <sys/syscallsubr.h>
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#include <sys/sysproto.h>
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#include <sys/signalvar.h>
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#include <sys/sysent.h>
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#include <sys/imgact.h>
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#include <sys/msgbuf.h>
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#include <sys/ptrace.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_page.h>
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#include <vm/vm_object.h>
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#include <vm/vm_pager.h>
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#include <machine/cpu.h>
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#include <machine/kdb.h>
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#include <machine/reg.h>
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#include <machine/vmparam.h>
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#include <machine/spr.h>
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#include <machine/hid.h>
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#include <machine/psl.h>
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#include <machine/trap.h>
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#include <machine/md_var.h>
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#include <machine/mmuvar.h>
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#include <machine/sigframe.h>
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#include <machine/machdep.h>
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#include <machine/metadata.h>
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#include <machine/platform.h>
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#include <sys/linker.h>
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#include <sys/reboot.h>
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#include <contrib/libfdt/libfdt.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#ifdef DDB
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#include <ddb/ddb.h>
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#endif
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#ifdef DEBUG
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#define debugf(fmt, args...) printf(fmt, ##args)
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#else
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#define debugf(fmt, args...)
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#endif
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extern unsigned char _etext[];
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extern unsigned char _edata[];
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extern unsigned char __bss_start[];
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extern unsigned char __sbss_start[];
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extern unsigned char __sbss_end[];
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extern unsigned char _end[];
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extern vm_offset_t __endkernel;
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/*
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* Bootinfo is passed to us by legacy loaders. Save the address of the
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* structure to handle backward compatibility.
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*/
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uint32_t *bootinfo;
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void print_kernel_section_addr(void);
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void print_kenv(void);
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uintptr_t booke_init(u_long, u_long);
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void ivor_setup(void);
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extern void *interrupt_vector_base;
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extern void *int_critical_input;
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extern void *int_machine_check;
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extern void *int_data_storage;
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extern void *int_instr_storage;
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extern void *int_external_input;
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extern void *int_alignment;
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extern void *int_fpu;
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extern void *int_program;
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extern void *int_syscall;
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extern void *int_decrementer;
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extern void *int_fixed_interval_timer;
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extern void *int_watchdog;
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extern void *int_data_tlb_error;
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extern void *int_inst_tlb_error;
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extern void *int_debug;
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extern void *int_vec;
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extern void *int_vecast;
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#ifdef HWPMC_HOOKS
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extern void *int_performance_counter;
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#endif
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#define SET_TRAP(ivor, handler) \
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KASSERT(((uintptr_t)(&handler) & ~0xffffUL) == \
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((uintptr_t)(&interrupt_vector_base) & ~0xffffUL), \
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("Handler " #handler " too far from interrupt vector base")); \
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mtspr(ivor, (uintptr_t)(&handler) & 0xffffUL);
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uintptr_t powerpc_init(vm_offset_t fdt, vm_offset_t, vm_offset_t, void *mdp);
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void booke_cpu_init(void);
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void
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booke_cpu_init(void)
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{
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cpu_features |= PPC_FEATURE_BOOKE;
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pmap_mmu_install(MMU_TYPE_BOOKE, BUS_PROBE_GENERIC);
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}
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void
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ivor_setup(void)
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{
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mtspr(SPR_IVPR, ((uintptr_t)&interrupt_vector_base) & 0xffff0000);
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SET_TRAP(SPR_IVOR0, int_critical_input);
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SET_TRAP(SPR_IVOR1, int_machine_check);
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SET_TRAP(SPR_IVOR2, int_data_storage);
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SET_TRAP(SPR_IVOR3, int_instr_storage);
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SET_TRAP(SPR_IVOR4, int_external_input);
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SET_TRAP(SPR_IVOR5, int_alignment);
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SET_TRAP(SPR_IVOR6, int_program);
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SET_TRAP(SPR_IVOR8, int_syscall);
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SET_TRAP(SPR_IVOR10, int_decrementer);
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SET_TRAP(SPR_IVOR11, int_fixed_interval_timer);
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SET_TRAP(SPR_IVOR12, int_watchdog);
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SET_TRAP(SPR_IVOR13, int_data_tlb_error);
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SET_TRAP(SPR_IVOR14, int_inst_tlb_error);
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SET_TRAP(SPR_IVOR15, int_debug);
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#ifdef HWPMC_HOOKS
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SET_TRAP(SPR_IVOR35, int_performance_counter);
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#endif
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switch ((mfpvr() >> 16) & 0xffff) {
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case FSL_E6500:
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SET_TRAP(SPR_IVOR32, int_vec);
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SET_TRAP(SPR_IVOR33, int_vecast);
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/* FALLTHROUGH */
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case FSL_E500mc:
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case FSL_E5500:
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SET_TRAP(SPR_IVOR7, int_fpu);
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break;
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case FSL_E500v1:
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case FSL_E500v2:
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SET_TRAP(SPR_IVOR32, int_vec);
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break;
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}
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}
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static int
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booke_check_for_fdt(uint32_t arg1, vm_offset_t *dtbp)
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{
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void *ptr;
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int fdt_size;
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if (arg1 % 8 != 0)
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return (-1);
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ptr = (void *)pmap_early_io_map(arg1, PAGE_SIZE);
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if (fdt_check_header(ptr) != 0)
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return (-1);
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/*
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* Read FDT total size from the header of FDT.
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* This for sure hits within first page which is
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* already mapped.
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*/
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fdt_size = fdt_totalsize((void *)ptr);
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/*
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* Ok, arg1 points to FDT, so we need to map it in.
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* First, unmap this page and then map FDT again with full size
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*/
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pmap_early_io_unmap((vm_offset_t)ptr, PAGE_SIZE);
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ptr = (void *)pmap_early_io_map(arg1, fdt_size);
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*dtbp = (vm_offset_t)ptr;
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return (0);
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}
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uintptr_t
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booke_init(u_long arg1, u_long arg2)
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{
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uintptr_t ret;
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void *mdp;
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vm_offset_t dtbp, end;
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end = (uintptr_t)_end;
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dtbp = (vm_offset_t)NULL;
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/* Set up TLB initially */
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bootinfo = NULL;
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bzero(__sbss_start, __sbss_end - __sbss_start);
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bzero(__bss_start, _end - __bss_start);
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tlb1_init();
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/*
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* Handle the various ways we can get loaded and started:
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* - FreeBSD's loader passes the pointer to the metadata
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* in arg1, with arg2 undefined. arg1 has a value that's
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* relative to the kernel's link address (i.e. larger
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* than 0xc0000000).
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* - Juniper's loader passes the metadata pointer in arg2
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* and sets arg1 to zero. This is to signal that the
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* loader maps the kernel and starts it at its link
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* address (unlike the FreeBSD loader).
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* - U-Boot passes the standard argc and argv parameters
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* in arg1 and arg2 (resp). arg1 is between 1 and some
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* relatively small number, such as 64K. arg2 is the
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* physical address of the argv vector.
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* - ePAPR loaders pass an FDT blob in r3 (arg1) and the magic hex
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* string 0x45504150 ('EPAP') in r6 (which has been lost by now).
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* r4 (arg2) is supposed to be set to zero, but is not always.
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*/
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if (arg1 == 0) /* Juniper loader */
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mdp = (void *)arg2;
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else if (booke_check_for_fdt(arg1, &dtbp) == 0) { /* ePAPR */
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end = roundup(end, 8);
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memmove((void *)end, (void *)dtbp, fdt_totalsize((void *)dtbp));
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dtbp = end;
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end += fdt_totalsize((void *)dtbp);
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__endkernel = end;
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mdp = NULL;
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} else if (arg1 > (uintptr_t)btext) /* FreeBSD loader */
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mdp = (void *)arg1;
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else /* U-Boot */
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mdp = NULL;
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/* Default to 32 byte cache line size. */
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switch ((mfpvr()) >> 16) {
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case FSL_E500mc:
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case FSL_E5500:
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case FSL_E6500:
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cacheline_size = 64;
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break;
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}
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ret = powerpc_init(dtbp, 0, 0, mdp);
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/* Enable caches */
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booke_enable_l1_cache();
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booke_enable_l2_cache();
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booke_enable_bpred();
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return (ret);
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}
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#define RES_GRANULE 32
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extern uint32_t tlb0_miss_locks[];
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/* Initialise a struct pcpu. */
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void
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cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz)
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{
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pcpu->pc_tid_next = TID_MIN;
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#ifdef SMP
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uint32_t *ptr;
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int words_per_gran = RES_GRANULE / sizeof(uint32_t);
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ptr = &tlb0_miss_locks[cpuid * words_per_gran];
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pcpu->pc_booke_tlb_lock = ptr;
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*ptr = TLB_UNLOCKED;
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*(ptr + 1) = 0; /* recurse counter */
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#endif
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}
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/* Shutdown the CPU as much as possible. */
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void
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cpu_halt(void)
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{
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mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE));
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while (1)
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;
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}
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int
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ptrace_single_step(struct thread *td)
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{
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struct trapframe *tf;
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tf = td->td_frame;
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tf->srr1 |= PSL_DE;
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tf->cpu.booke.dbcr0 |= (DBCR0_IDM | DBCR0_IC);
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return (0);
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}
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int
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ptrace_clear_single_step(struct thread *td)
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{
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struct trapframe *tf;
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tf = td->td_frame;
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tf->srr1 &= ~PSL_DE;
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tf->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
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return (0);
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}
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void
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kdb_cpu_clear_singlestep(void)
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{
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register_t r;
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r = mfspr(SPR_DBCR0);
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mtspr(SPR_DBCR0, r & ~DBCR0_IC);
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kdb_frame->srr1 &= ~PSL_DE;
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}
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void
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kdb_cpu_set_singlestep(void)
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{
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register_t r;
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r = mfspr(SPR_DBCR0);
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mtspr(SPR_DBCR0, r | DBCR0_IC | DBCR0_IDM);
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kdb_frame->srr1 |= PSL_DE;
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}
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