3f293aaf2c
Push protocol violation handler to its own routine. We now properly detect and recovery from the following target induced protocol violations: o Unexpected or invalid non-packetized Relesection o Command complete with no status message o Good Status after incomplete cdb transfer Add an SCB collision avoidance algorithm that allows us to use all 512 SCBs for non-packetized operations. There is still the possibility of running out of SCBs with non-colliding tag identifiers, but the algorithm ensures that the stall will be rare and short lived. Convert to a read-only algorithm for validing entries in the qoufifo. The sequencer now toggles the high bit of the SCB identifier on each wrap around of the qinfifo. If the high bit doesn't match the expected value for this pass of the qoufifo, the entry is not valid. This has the benefit of working on machines that have large granularity cache write back semantics without requiring any additional memory. Remove lots of code related to untagged SCB queues. Since these controllers can keep a fully busy target table, we will never have untagged SCB queues. Lots of improvements to diagnostic logging. Clarify some comments. Don't clear BUSFREE interrupt enable in SIMODE1 in the SELTO handler. Just clearing the interrupt status is sufficient and this avoids the chance of disabling busfree detection in connection that occurs while we are handling the busfree interrupt. Clear all possible interrupt sources when handling a busfree interrupt. The hardware clears some but not all of them. Don't panic if we get into the default SCSIINT handler. Dump the card state and clear all interrupt sources in the hope that we can continue. LASTPHASE != PREVPHASE. Use the correct PREVPHASE for testing against values in the PERRDIAG register. According to SPI4, the bus free that is required after certain PPR negotiations will only occur at the end of all message phases. Handle the bus free if it occurs after a transaction in either the message-in or message-out phases. The busfree can also occur if the status of IU_REQ changes due to a WDTR or SDTR message. We now set the expect busfree flag in ahd_set_syncrate so that it works regardless of message type. Correct a problem with missing certain busfree events. The chip supports single-stepping even if a SCSIINT is pending. This obviates the need to clear all of the SCSI interrupt enables prior to single stepping. Since ENBUSFREE can only be disabled manually and not re-enabled, avoiding touching this bit in the single-step case yields reliable bus free detection. Enhance ahd_clear_intstat to clear all SCSIINT sources. Only use ahd_update_pending_scbs() if we are active on the bus. We cannot modify the "MK_MESSAGE" bits on SCBs in the execution queue if a selection might be in process since the sequencer uses this bit to detect PPR negotiation to a target with an outstanding IU_REQ agreement. Allocate the SCB delivery mechansim's sentinal SCB specially so we don't waste a valid SCB for this task. Move tranceive state settle logic to ahd_chip_init() since this needs to occur after every chip reset, not just the chip reset that happens during primary driver initialization. Correct a bug with transmitting lun information in packetized connections. Restrict busy target table operations to the range of luns that can be used for non-packetized connections. Larger luns can only be accessed in packetized mode. Correct a busy target table addressing bug. Be more careful about how we shutdown the DMA engines during bus reset events. Only freeze the SIMQ once regardless of the number of bus reset events that occur while we are polling for the resets to stop. Don't rely on the sequencer remaining paused() during our reset poll. It is safe for the sequencer to run during this time, and many callers to the bus reset code would need to be modified to make this assumption universally true. Even if we are not going to clobber SCB state when an auto-request sense SCB has a check condition, we must still unfreeze the queue. Re-arrange the BAD STATUS handler to handle this case appropriately. Modify the SCB download size depending on whether long luns are being stored in the SCB. Add ahd_print_register() for pretty printing register diagnostics. Don't trust that the flexport logic to detect the presence of a seeprom is available. It may not be on some motherboard implementations. "the the" -> "the" |
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| .. | ||
| aicasm | ||
| ahc_eisa.c | ||
| ahc_pci.c | ||
| ahd_pci.c | ||
| aic7xxx_93cx6.c | ||
| aic7xxx_93cx6.h | ||
| aic7xxx_inline.h | ||
| aic7xxx_osm.c | ||
| aic7xxx_osm.h | ||
| aic7xxx_pci.c | ||
| aic7xxx.c | ||
| aic7xxx.h | ||
| aic7xxx.reg | ||
| aic7xxx.seq | ||
| aic79xx_inline.h | ||
| aic79xx_osm.c | ||
| aic79xx_osm.h | ||
| aic79xx_pci.c | ||
| aic79xx.c | ||
| aic79xx.h | ||
| aic79xx.reg | ||
| aic79xx.seq | ||
| aic7770.c | ||