bf41341894
round-robin fashion, starting with the highest priority interrupt on the highest-numbered CPU and cycling downwards.
94 lines
3.1 KiB
C
94 lines
3.1 KiB
C
/*-
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* Copyright (c) 2007-2010 Marcel Moolenaar
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_INTR_H_
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#define _MACHINE_INTR_H_
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#define IA64_NXIVS 256 /* External Interrupt Vectors */
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#define IA64_MIN_XIV 16
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#define IA64_MAX_HWPRIO 14
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struct pcpu;
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struct sapic;
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struct thread;
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struct trapframe;
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/*
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* Layout of the Processor Interrupt Block.
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*/
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struct ia64_pib
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{
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uint64_t ib_ipi[65536][2]; /* 64K-way IPIs (1MB area). */
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uint8_t _rsvd1[0xe0000];
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uint8_t ib_inta; /* Generate INTA cycle. */
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uint8_t _rsvd2[7];
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uint8_t ib_xtp; /* External Task Priority. */
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uint8_t _rsvd3[7];
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uint8_t _rsvd4[0x1fff0];
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};
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enum ia64_xiv_use {
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IA64_XIV_FREE,
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IA64_XIV_ARCH, /* Architecturally defined. */
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IA64_XIV_PLAT, /* Platform defined. */
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IA64_XIV_IPI, /* Used for IPIs. */
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IA64_XIV_IRQ /* Used for external interrupts. */
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};
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typedef u_int (ia64_ihtype)(struct thread *, u_int, struct trapframe *);
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extern struct ia64_pib *ia64_pib;
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void ia64_bind_intr(void);
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void ia64_handle_intr(struct trapframe *);
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int ia64_setup_intr(const char *, int, driver_filter_t, driver_intr_t,
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void *, enum intr_type, void **);
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int ia64_teardown_intr(void *);
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void ia64_xiv_init(void);
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u_int ia64_xiv_alloc(u_int, enum ia64_xiv_use, ia64_ihtype);
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int ia64_xiv_free(u_int, enum ia64_xiv_use);
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int ia64_xiv_reserve(u_int, enum ia64_xiv_use, ia64_ihtype);
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int sapic_bind_intr(u_int, struct pcpu *);
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int sapic_config_intr(u_int, enum intr_trigger, enum intr_polarity);
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struct sapic *sapic_create(u_int, u_int, uint64_t);
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int sapic_enable(struct sapic *, u_int, u_int);
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void sapic_eoi(struct sapic *, u_int);
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struct sapic *sapic_lookup(u_int, u_int *);
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void sapic_mask(struct sapic *, u_int);
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void sapic_unmask(struct sapic *, u_int);
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#ifdef DDB
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void sapic_print(struct sapic *, u_int);
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#endif
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#endif /* !_MACHINE_INTR_H_ */
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