imp 86f7da9248 Make the pps interrupt register as MPSAFE and FAST. Use a spin lock ... to syncrhonize access to the data as a result. This makes the pps less likely to miss the 1ms pulse that I'm feeding it, but not entirely reliable yet on my 133MHz P5. Reviewed by: phk		2005-03-11 07:03:46 +00:00
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if_plip.c	Apply error and success logic consistently to the function netisr_queue() and	2004-08-27 18:33:08 +00:00
immio.c
lpbb.c
lpt.c	Start each of the license/copyright comments with /*-, minor shuffle of lines	2005-01-06 01:43:34 +00:00
lpt.h
lptio.h	Start each of the license/copyright comments with /*-, minor shuffle of lines	2005-01-06 01:43:34 +00:00
pcfclock.c	Start each of the license/copyright comments with /*-, minor shuffle of lines	2005-01-06 01:43:34 +00:00
ppb_1284.c
ppb_1284.h
ppb_base.c
ppb_msq.c
ppb_msq.h
ppbconf.c
ppbconf.h
ppbio.h
ppbus_if.m	Start each of the license/copyright comments with /*-, minor shuffle of lines	2005-01-06 01:43:34 +00:00
ppi.c
ppi.h
pps.c	Make the pps interrupt register as MPSAFE and FAST. Use a spin lock	2005-03-11 07:03:46 +00:00
vpo.c
vpoio.c
vpoio.h