mav c73145e084 Clear all ports interrupt status bits in single write. Clearing one by one ...

causes additional MSIs messages sent if several ports asked for attention
same time. Time window before clearing is not important, as these interrupts
are level triggered by interrupt source.

2009-12-21 21:27:56 +00:00

..

ahci.c

Clear all ports interrupt status bits in single write. Clearing one by one

2009-12-21 21:27:56 +00:00

ahci.h

MFp4:

2009-11-26 08:49:46 +00:00