690 lines
16 KiB
C
690 lines
16 KiB
C
/*
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*
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* ===================================
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* HARP | Host ATM Research Platform
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* ===================================
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*
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*
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* This Host ATM Research Platform ("HARP") file (the "Software") is
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* made available by Network Computing Services, Inc. ("NetworkCS")
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* "AS IS". NetworkCS does not provide maintenance, improvements or
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* support of any kind.
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*
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* NETWORKCS MAKES NO WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED,
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* INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE, AS TO ANY ELEMENT OF THE
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* SOFTWARE OR ANY SUPPORT PROVIDED IN CONNECTION WITH THIS SOFTWARE.
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* In no event shall NetworkCS be responsible for any damages, including
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* but not limited to consequential damages, arising from or relating to
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* any use of the Software or related support.
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*
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* Copyright 1994-1998 Network Computing Services, Inc.
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*
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* Copies of this Software may be made, however, the above copyright
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* notice must be reproduced on all copies.
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*
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* @(#) $FreeBSD$
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*
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*/
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/*
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* Efficient ENI adapter support
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* -----------------------------
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*
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* Module supports PCI interface to ENI adapter
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*
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*/
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#ifdef COMPILING_LINT
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#warning "The eni driver is broken and is not compiled with LINT"
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#else
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/socket.h>
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#include <sys/socketvar.h>
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#include <sys/syslog.h>
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#include <sys/eventhandler.h>
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#include <net/if.h>
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#include <netatm/port.h>
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#include <netatm/queue.h>
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#include <netatm/atm.h>
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#include <netatm/atm_sys.h>
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#include <netatm/atm_sap.h>
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#include <netatm/atm_cm.h>
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#include <netatm/atm_if.h>
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#include <netatm/atm_stack.h>
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#include <netatm/atm_pcb.h>
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#include <netatm/atm_var.h>
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#include <dev/hea/eni_stats.h>
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#include <dev/hea/eni.h>
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#include <dev/hea/eni_var.h>
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#ifndef lint
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__RCSID("@(#) $FreeBSD$");
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#endif
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#ifndef COMPAT_OLDPCI
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#error "The eni device requires the old pci compatibility shims"
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#endif
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/*
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* Typedef local functions
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*/
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static const char *eni_pci_probe __P((pcici_t, pcidi_t));
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static void eni_pci_attach __P((pcici_t, int));
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static int eni_get_ack __P((Eni_unit *));
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static int eni_get_sebyte __P((Eni_unit *));
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static void eni_read_seeprom __P((Eni_unit *));
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#if BSD < 199506
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static int eni_pci_shutdown __P((struct kern_devconf *, int));
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#else
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static void eni_pci_shutdown __P((void *, int));
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#endif
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static void eni_pci_reset __P((Eni_unit *));
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/*
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* Used by kernel to return number of claimed devices
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*/
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static u_long eni_nunits;
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static struct pci_device eni_pci_device = {
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ENI_DEV_NAME,
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eni_pci_probe,
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eni_pci_attach,
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&eni_nunits,
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#if BSD < 199506
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eni_pci_shutdown
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#else
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NULL
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#endif
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};
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COMPAT_PCI_DRIVER (eni_pci, eni_pci_device);
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/*
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* Called by kernel with PCI device_id which was read from the PCI
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* register set. If the identified vendor is Efficient, see if we
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* recognize the particular device. If so, return an identifying string,
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* if not, return null.
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*
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* Arguments:
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* config_id PCI config token
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* device_id contents of PCI device ID register
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*
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* Returns:
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* string Identifying string if we will handle this device
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* NULL unrecognized vendor/device
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*
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*/
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static const char *
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eni_pci_probe ( pcici_t config_id, pcidi_t device_id )
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{
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if ( (device_id & 0xFFFF) == EFF_VENDOR_ID ) {
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switch ( (device_id >> 16) ) {
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case EFF_DEV_ID:
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return ( "Efficient ENI ATM Adapter" );
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/* NOTREACHED */
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break;
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}
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}
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return ( NULL );
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}
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/*
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* The ENI-155p adapter uses an ATMEL AT24C01 serial EEPROM to store
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* configuration information. The SEEPROM is accessed via two wires,
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* CLOCK and DATA, which are accessible via the PCI configuration
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* registers. The following macros manipulate the lines to access the
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* SEEPROM. See http://www.atmel.com/atmel/products/prod162.htm for
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* a description of the AT24C01 part. Value to be read/written is
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* part of the per unit structure.
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*/
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/*
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* Write bits to SEEPROM
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*/
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#define WRITE_SEEPROM() ( \
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{ \
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(void) pci_conf_write ( eup->eu_pcitag, SEEPROM, \
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eup->eu_sevar ); \
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DELAY(SEPROM_DELAY); \
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} \
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)
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/*
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* Stobe first the DATA, then the CLK lines high
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*/
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#define STROBE_HIGH() ( \
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{ \
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eup->eu_sevar |= SEPROM_DATA; WRITE_SEEPROM(); \
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eup->eu_sevar |= SEPROM_CLK; WRITE_SEEPROM(); \
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} \
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)
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/*
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* Strobe first the CLK, then the DATA lines high
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*/
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#define INV_STROBE_HIGH() ( \
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{ \
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eup->eu_sevar |= SEPROM_CLK; WRITE_SEEPROM(); \
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eup->eu_sevar |= SEPROM_DATA; WRITE_SEEPROM(); \
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} \
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)
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/*
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* Strobe first the CLK, then the DATA lines low - companion to
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* STROBE_HIGH()
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*/
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#define STROBE_LOW() ( \
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{ \
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eup->eu_sevar &= ~SEPROM_CLK; WRITE_SEEPROM(); \
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eup->eu_sevar &= ~SEPROM_DATA; WRITE_SEEPROM(); \
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} \
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)
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/*
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* Strobe first the DATA, then the CLK lines low - companion to
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* INV_STROBE_HIGH()
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*/
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#define INV_STROBE_LOW() ( \
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{ \
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eup->eu_sevar &= ~SEPROM_DATA; WRITE_SEEPROM(); \
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eup->eu_sevar &= ~SEPROM_CLK; WRITE_SEEPROM(); \
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} \
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)
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/*
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* Strobe the CLK line high, then low
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*/
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#define STROBE_CLK() ( \
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{ \
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eup->eu_sevar |= SEPROM_CLK; WRITE_SEEPROM(); \
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eup->eu_sevar &= ~SEPROM_CLK; WRITE_SEEPROM(); \
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} \
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)
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/*
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* Look for a positive ACK from the SEEPROM. Cycle begins by asserting
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* the DATA line, then the CLK line. The DATA line is then read to
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* retrieve the ACK status, and then the cycle is finished by deasserting
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* the CLK line, and asserting the DATA line.
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*
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* Arguments:
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* eup pointer to per unit structure
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*
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* Returns:
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* 0/1 value of ACK
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*
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*/
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static int
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eni_get_ack ( eup )
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Eni_unit *eup;
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{
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int ack;
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STROBE_HIGH();
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/*
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* Read DATA line from SEPROM
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*/
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eup->eu_sevar = pci_conf_read ( eup->eu_pcitag, SEEPROM );
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DELAY ( SEPROM_DELAY );
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ack = eup->eu_sevar & SEPROM_DATA;
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eup->eu_sevar &= ~SEPROM_CLK;
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WRITE_SEEPROM ();
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eup->eu_sevar |= SEPROM_DATA;
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WRITE_SEEPROM ();
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return ( ack );
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}
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/*
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* Read a byte from the SEEPROM. Data is read as 8 bits. There are two types
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* of read operations. The first is a single byte read, the second is
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* multiple sequential bytes read. Both cycles begin with a 'START' operation,
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* followed by a memory address word. Following the memory address, the
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* SEEPROM will send a data byte, followed by an ACK. If the host responds
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* with a 'STOP' operation, then a single byte cycle is performed. If the
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* host responds with an 'ACK', then the memory address is incremented, and
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* the next sequential memory byte is serialized.
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*
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* Arguments:
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* eup pointer to per unit structure
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*
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* Returns:
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* val value of byte read from SEEPROM
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*
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*/
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static int
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eni_get_sebyte( eup )
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Eni_unit *eup;
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{
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int i;
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int data;
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int rval;
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/* Initial value */
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rval = 0;
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/* Read 8 bits */
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for ( i = 0; i < 8; i++ ) {
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/* Shift bits to left so the next bit goes to position 0 */
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rval <<= 1;
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/* Indicate we're ready to read bit */
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STROBE_HIGH();
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/*
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* Read DATA line from SEPROM
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*/
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data = pci_conf_read ( eup->eu_pcitag, SEEPROM );
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DELAY ( SEPROM_DELAY );
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/* (Possibly) mask bit into accumulating value */
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if ( data & SEPROM_DATA )
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rval |= 1; /* If DATA bit '1' */
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/* Indicate we're done reading this bit */
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STROBE_LOW();
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}
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/* Return acquired byte */
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return ( rval );
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}
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/*
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* The AT24C01 is a 1024 bit part organized as 128 words by 8 bits.
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* We will read the entire contents into the per unit structure. Later,
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* we'll retrieve the MAC address and serial number from the data read.
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*
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* Arguments:
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* eup pointer to per unit structure
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*
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* Returns:
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* none
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*
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*/
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static void
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eni_read_seeprom ( eup )
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Eni_unit *eup;
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{
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int addr;
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int i, j;
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/*
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* Set initial state
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*/
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eup->eu_sevar = SEPROM_DATA | SEPROM_CLK;
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WRITE_SEEPROM ();
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/* Loop for all bytes */
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for ( i = 0; i < SEPROM_SIZE ; i++ ) {
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/* Send START operation */
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STROBE_HIGH();
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INV_STROBE_LOW();
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/*
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* Send address. Addresses are sent as 7 bits plus
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* last bit high.
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*/
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addr = ((i) << 1) + 1;
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/*
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* Start with high order bit first working toward low
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* order bit.
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*/
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for ( j = 7; j >= 0; j-- ) {
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/* Set current bit value */
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eup->eu_sevar = ( addr >> j ) & 1 ?
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eup->eu_sevar | SEPROM_DATA :
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eup->eu_sevar & ~SEPROM_DATA;
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WRITE_SEEPROM ();
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/* Indicate we've sent it */
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STROBE_CLK();
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}
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/*
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* We expect a zero ACK after sending the address
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*/
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if ( !eni_get_ack ( eup ) ) {
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/* Address okay - read data byte */
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eup->eu_seeprom[i] = eni_get_sebyte ( eup );
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/* Grab but ignore the ACK op */
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(void) eni_get_ack ( eup );
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} else {
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/* Address ACK was bad - can't retrieve data byte */
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eup->eu_seeprom[i] = 0xff;
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}
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}
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return;
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}
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/*
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* The kernel has found a device which we are willing to support.
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* We are now being called to do any necessary work to make the
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* device initially usable. In our case, this means allocating
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* structure memory, configuring registers, mapping device
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* memory, setting pointers, registering with the core services,
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* and doing the initial PDU processing configuration.
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*
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* Arguments:
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* config_id PCI device token
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* unit instance of the unit
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*
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* Returns:
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* none
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*
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*/
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static void
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eni_pci_attach ( pcici_t config_id, int unit )
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{
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vm_offset_t va;
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vm_offset_t pa;
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Eni_unit *eup;
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long val;
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/*
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* Just checking...
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*/
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if ( unit >= ENI_MAX_UNITS ) {
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log ( LOG_ERR, "%s%d: too many devices\n",
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ENI_DEV_NAME, unit );
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return;
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}
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/*
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* Make sure this isn't a duplicate unit
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*/
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if ( eni_units[unit] != NULL )
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return;
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/*
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* Allocate a new unit structure
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*/
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eup = (Eni_unit *) atm_dev_alloc ( sizeof(Eni_unit), sizeof(int), 0 );
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if ( eup == NULL )
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return;
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/*
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* Start initializing it
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*/
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eup->eu_unit = unit;
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eup->eu_mtu = ENI_IFF_MTU;
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eup->eu_pcitag = config_id;
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eup->eu_ioctl = eni_atm_ioctl;
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eup->eu_instvcc = eni_instvcc;
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eup->eu_openvcc = eni_openvcc;
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eup->eu_closevcc = eni_closevcc;
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eup->eu_output = eni_output;
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eup->eu_vcc_pool = &eni_vcc_pool;
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eup->eu_nif_pool = &eni_nif_pool;
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/*
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* Enable Memory Mapping / Bus Mastering
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*/
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val = pci_conf_read(config_id, PCI_COMMAND_STATUS_REG);
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val |= (PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
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pci_conf_write(config_id, PCI_COMMAND_STATUS_REG, val);
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/*
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* Map in adapter RAM
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*/
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val = pci_conf_read(config_id, PCI_COMMAND_STATUS_REG);
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if ((val & PCIM_CMD_MEMEN) == 0) {
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log(LOG_ERR, "%s%d: memory mapping not enabled\n",
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ENI_DEV_NAME, unit);
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goto failed;
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}
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if ( ( pci_map_mem ( config_id, PCI_MAP_REG_START, &va, &pa ) ) == 0 )
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{
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log(LOG_ERR, "%s%d: unable to map memory\n",
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ENI_DEV_NAME, unit);
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goto failed;
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}
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/*
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* Map okay - retain address assigned
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*/
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eup->eu_base = (Eni_mem)va;
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eup->eu_ram = (Eni_mem)(eup->eu_base + RAM_OFFSET);
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/*
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* Map memory structures into adapter space
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*/
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eup->eu_suni = (Eni_mem)(eup->eu_base + SUNI_OFFSET);
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eup->eu_midway = (Eni_mem)(eup->eu_base + MIDWAY_OFFSET);
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eup->eu_vcitbl = (VCI_Table *)(eup->eu_base + VCITBL_OFFSET);
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eup->eu_rxdma = (Eni_mem)(eup->eu_base + RXQUEUE_OFFSET);
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eup->eu_txdma = (Eni_mem)(eup->eu_base + TXQUEUE_OFFSET);
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eup->eu_svclist = (Eni_mem)(eup->eu_base + SVCLIST_OFFSET);
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eup->eu_servread = 0;
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/*
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* Reset the midway chip
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*/
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eup->eu_midway[MIDWAY_ID] = MIDWAY_RESET;
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/*
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* Size and test adapter memory. Initialize our adapter memory
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* allocater.
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*/
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if ( eni_init_memory ( eup ) < 0 ) {
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/*
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* Adapter memory test failed. Clean up and
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* return.
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*/
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log(LOG_ERR, "%s%d: memory test failed\n",
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ENI_DEV_NAME, unit);
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goto failed;
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}
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/*
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* Read the contents of the SEEPROM
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*/
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eni_read_seeprom ( eup );
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/*
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* Copy MAC address to PIF and config structures
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*/
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KM_COPY ( (caddr_t)&eup->eu_seeprom[SEPROM_MAC_OFF],
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(caddr_t)&eup->eu_pif.pif_macaddr, sizeof(struct mac_addr) );
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eup->eu_config.ac_macaddr = eup->eu_pif.pif_macaddr;
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/*
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* Copy serial number into config space
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*/
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eup->eu_config.ac_serial =
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ntohl(*(u_long *)&eup->eu_seeprom[SEPROM_SN_OFF]);
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/*
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* Convert Endianess on DMA
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*/
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val = pci_conf_read ( config_id, PCI_CONTROL_REG );
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val |= ENDIAN_SWAP_DMA;
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pci_conf_write ( config_id, PCI_CONTROL_REG, val );
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/*
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* Map interrupt in
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*/
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if ( !pci_map_int ( config_id, eni_intr, (void *)eup, &net_imask ) )
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{
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log(LOG_ERR, "%s%d: unable to map interrupt\n",
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ENI_DEV_NAME, unit);
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goto failed;
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}
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/*
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* Setup some of the adapter configuration
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*/
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/*
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* Get MIDWAY ID
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*/
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val = eup->eu_midway[MIDWAY_ID];
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eup->eu_config.ac_vendor = VENDOR_ENI;
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eup->eu_config.ac_vendapi = VENDAPI_ENI_1;
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eup->eu_config.ac_device = DEV_ENI_155P;
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eup->eu_config.ac_media = val & MEDIA_MASK ? MEDIA_UTP155 : MEDIA_OC3C;
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eup->eu_pif.pif_pcr = ATM_PCR_OC3C;
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eup->eu_config.ac_bustype = BUS_PCI;
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eup->eu_config.ac_busslot = config_id->bus << 8 | config_id->slot;
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/*
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* Make a hw version number from the ID register values.
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* Format: {Midway ID}.{Mother board ID}.{Daughter board ID}
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*/
|
|
snprintf ( eup->eu_config.ac_hard_vers,
|
|
sizeof ( eup->eu_config.ac_hard_vers ),
|
|
"%ld/%ld/%ld",
|
|
(val >> ID_SHIFT) & ID_MASK,
|
|
(val >> MID_SHIFT) & MID_MASK,
|
|
(val >> DID_SHIFT) & DID_MASK );
|
|
|
|
/*
|
|
* There is no software version number
|
|
*/
|
|
eup->eu_config.ac_firm_vers[0] = '\0';
|
|
|
|
/*
|
|
* Save device ram info for user-level programs
|
|
* NOTE: This really points to start of EEPROM
|
|
* and includes all the device registers in the
|
|
* lower 2 Megabytes.
|
|
*/
|
|
eup->eu_config.ac_ram = (long)eup->eu_base;
|
|
eup->eu_config.ac_ramsize = eup->eu_ramsize + ENI_REG_SIZE;
|
|
|
|
/*
|
|
* Setup max VPI/VCI values
|
|
*/
|
|
eup->eu_pif.pif_maxvpi = ENI_MAX_VPI;
|
|
eup->eu_pif.pif_maxvci = ENI_MAX_VCI;
|
|
|
|
/*
|
|
* Register this interface with ATM core services
|
|
*/
|
|
if ( atm_physif_register
|
|
( (Cmn_unit *)eup, ENI_DEV_NAME, eni_services ) != 0 )
|
|
{
|
|
/*
|
|
* Registration failed - back everything out
|
|
*/
|
|
log(LOG_ERR, "%s%d: atm_physif_register failed\n",
|
|
ENI_DEV_NAME, unit);
|
|
goto failed;
|
|
}
|
|
|
|
eni_units[unit] = eup;
|
|
|
|
#if BSD >= 199506
|
|
/*
|
|
* Add hook to out shutdown function
|
|
*/
|
|
EVENTHANDLER_REGISTER(shutdown_post_sync, eni_pci_shutdown, eup,
|
|
SHUTDOWN_PRI_DEFAULT);
|
|
|
|
#endif
|
|
|
|
/*
|
|
* Initialize driver processing
|
|
*/
|
|
if ( eni_init ( eup ) ) {
|
|
log(LOG_ERR, "%s%d: adapter init failed\n",
|
|
ENI_DEV_NAME, unit);
|
|
goto failed;
|
|
}
|
|
|
|
return;
|
|
|
|
failed:
|
|
/*
|
|
* Attach failed - clean up
|
|
*/
|
|
eni_pci_reset(eup);
|
|
(void) pci_unmap_int(config_id);
|
|
atm_dev_free(eup);
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Device reset routine
|
|
*
|
|
* Arguments:
|
|
* eup pointer to per unit structure
|
|
*
|
|
* Returns:
|
|
* none
|
|
*
|
|
*/
|
|
static void
|
|
eni_pci_reset ( eup )
|
|
Eni_unit *eup;
|
|
{
|
|
|
|
/*
|
|
* We should really close down any open VCI's and
|
|
* release all memory (TX and RX) buffers. For now,
|
|
* we assume we're shutting the card down for good.
|
|
*/
|
|
|
|
if (eup->eu_midway) {
|
|
/*
|
|
* Issue RESET command to Midway chip
|
|
*/
|
|
eup->eu_midway[MIDWAY_ID] = MIDWAY_RESET;
|
|
|
|
/*
|
|
* Delay to allow everything to terminate
|
|
*/
|
|
DELAY ( MIDWAY_DELAY );
|
|
}
|
|
|
|
return;
|
|
}
|
|
|
|
#if BSD < 199506
|
|
/*
|
|
* Device shutdown routine
|
|
*
|
|
* Arguments:
|
|
* kdc pointer to device's configuration table
|
|
* force forced shutdown flag
|
|
*
|
|
* Returns:
|
|
* none
|
|
*
|
|
*/
|
|
static int
|
|
eni_pci_shutdown ( kdc, force )
|
|
struct kern_devconf *kdc;
|
|
int force;
|
|
{
|
|
Eni_unit *eup = NULL;
|
|
|
|
if ( kdc->kdc_unit < eni_nunits ) {
|
|
|
|
eup = eni_units[kdc->kdc_unit];
|
|
if ( eup != NULL ) {
|
|
/* Do device reset */
|
|
eni_pci_reset ( eup );
|
|
}
|
|
}
|
|
|
|
(void) dev_detach ( kdc );
|
|
return ( 0 );
|
|
}
|
|
#else
|
|
/*
|
|
* Device shutdown routine
|
|
*
|
|
* Arguments:
|
|
* howto type of shutdown
|
|
* eup pointer to device unit structure
|
|
*
|
|
* Returns:
|
|
* none
|
|
*
|
|
*/
|
|
static void
|
|
eni_pci_shutdown ( eup, howto )
|
|
void *eup;
|
|
int howto;
|
|
{
|
|
|
|
/* Do device reset */
|
|
eni_pci_reset ( eup );
|
|
|
|
}
|
|
#endif /* BSD < 199506 */
|
|
#endif
|