fdc8ba5e71
This is mostly a no-op other than for ARM where it adds missing __aeabi_mem* and __aeabi_*divmod functions. Even on ARM these will remain unused until the rest of the ARM EABI code is merged.
169 lines
6.4 KiB
C
169 lines
6.4 KiB
C
//===-- lib/truncdfsf2.c - double -> single conversion ------------*- C -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is dual licensed under the MIT and the University of Illinois Open
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// Source Licenses. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a fairly generic conversion from a wider to a narrower
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// IEEE-754 floating-point type in the default (round to nearest, ties to even)
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// rounding mode. The constants and types defined following the includes below
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// parameterize the conversion.
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//
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// This routine can be trivially adapted to support conversions to
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// half-precision or from quad-precision. It does not support types that don't
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// use the usual IEEE-754 interchange formats; specifically, some work would be
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// needed to adapt it to (for example) the Intel 80-bit format or PowerPC
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// double-double format.
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//
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// Note please, however, that this implementation is only intended to support
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// *narrowing* operations; if you need to convert to a *wider* floating-point
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// type (e.g. float -> double), then this routine will not do what you want it
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// to.
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//
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// It also requires that integer types at least as large as both formats
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// are available on the target platform; this may pose a problem when trying
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// to add support for quad on some 32-bit systems, for example.
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//
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// Finally, the following assumptions are made:
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//
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// 1. floating-point types and integer types have the same endianness on the
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// target platform
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//
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// 2. quiet NaNs, if supported, are indicated by the leading bit of the
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// significand field being set
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//
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//===----------------------------------------------------------------------===//
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#include "int_lib.h"
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typedef double src_t;
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typedef uint64_t src_rep_t;
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#define SRC_REP_C UINT64_C
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static const int srcSigBits = 52;
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typedef float dst_t;
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typedef uint32_t dst_rep_t;
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#define DST_REP_C UINT32_C
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static const int dstSigBits = 23;
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// End of specialization parameters. Two helper routines for conversion to and
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// from the representation of floating-point data as integer values follow.
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static inline src_rep_t srcToRep(src_t x) {
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const union { src_t f; src_rep_t i; } rep = {.f = x};
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return rep.i;
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}
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static inline dst_t dstFromRep(dst_rep_t x) {
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const union { dst_t f; dst_rep_t i; } rep = {.i = x};
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return rep.f;
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}
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// End helper routines. Conversion implementation follows.
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ARM_EABI_FNALIAS(d2f, truncdfsf2)
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COMPILER_RT_ABI dst_t
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__truncdfsf2(src_t a) {
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// Various constants whose values follow from the type parameters.
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// Any reasonable optimizer will fold and propagate all of these.
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const int srcBits = sizeof(src_t)*CHAR_BIT;
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const int srcExpBits = srcBits - srcSigBits - 1;
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const int srcInfExp = (1 << srcExpBits) - 1;
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const int srcExpBias = srcInfExp >> 1;
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const src_rep_t srcMinNormal = SRC_REP_C(1) << srcSigBits;
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const src_rep_t significandMask = srcMinNormal - 1;
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const src_rep_t srcInfinity = (src_rep_t)srcInfExp << srcSigBits;
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const src_rep_t srcSignMask = SRC_REP_C(1) << (srcSigBits + srcExpBits);
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const src_rep_t srcAbsMask = srcSignMask - 1;
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const src_rep_t roundMask = (SRC_REP_C(1) << (srcSigBits - dstSigBits)) - 1;
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const src_rep_t halfway = SRC_REP_C(1) << (srcSigBits - dstSigBits - 1);
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const int dstBits = sizeof(dst_t)*CHAR_BIT;
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const int dstExpBits = dstBits - dstSigBits - 1;
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const int dstInfExp = (1 << dstExpBits) - 1;
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const int dstExpBias = dstInfExp >> 1;
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const int underflowExponent = srcExpBias + 1 - dstExpBias;
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const int overflowExponent = srcExpBias + dstInfExp - dstExpBias;
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const src_rep_t underflow = (src_rep_t)underflowExponent << srcSigBits;
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const src_rep_t overflow = (src_rep_t)overflowExponent << srcSigBits;
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const dst_rep_t dstQNaN = DST_REP_C(1) << (dstSigBits - 1);
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const dst_rep_t dstNaNCode = dstQNaN - 1;
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// Break a into a sign and representation of the absolute value
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const src_rep_t aRep = srcToRep(a);
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const src_rep_t aAbs = aRep & srcAbsMask;
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const src_rep_t sign = aRep & srcSignMask;
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dst_rep_t absResult;
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if (aAbs - underflow < aAbs - overflow) {
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// The exponent of a is within the range of normal numbers in the
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// destination format. We can convert by simply right-shifting with
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// rounding and adjusting the exponent.
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absResult = aAbs >> (srcSigBits - dstSigBits);
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absResult -= (dst_rep_t)(srcExpBias - dstExpBias) << dstSigBits;
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const src_rep_t roundBits = aAbs & roundMask;
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// Round to nearest
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if (roundBits > halfway)
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absResult++;
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// Ties to even
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else if (roundBits == halfway)
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absResult += absResult & 1;
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}
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else if (aAbs > srcInfinity) {
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// a is NaN.
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// Conjure the result by beginning with infinity, setting the qNaN
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// bit and inserting the (truncated) trailing NaN field.
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absResult = (dst_rep_t)dstInfExp << dstSigBits;
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absResult |= dstQNaN;
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absResult |= aAbs & dstNaNCode;
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}
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else if (aAbs > overflow) {
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// a overflows to infinity.
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absResult = (dst_rep_t)dstInfExp << dstSigBits;
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}
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else {
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// a underflows on conversion to the destination type or is an exact
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// zero. The result may be a denormal or zero. Extract the exponent
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// to get the shift amount for the denormalization.
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const int aExp = aAbs >> srcSigBits;
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const int shift = srcExpBias - dstExpBias - aExp + 1;
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const src_rep_t significand = (aRep & significandMask) | srcMinNormal;
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// Right shift by the denormalization amount with sticky.
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if (shift > srcSigBits) {
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absResult = 0;
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} else {
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const bool sticky = significand << (srcBits - shift);
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src_rep_t denormalizedSignificand = significand >> shift | sticky;
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absResult = denormalizedSignificand >> (srcSigBits - dstSigBits);
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const src_rep_t roundBits = denormalizedSignificand & roundMask;
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// Round to nearest
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if (roundBits > halfway)
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absResult++;
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// Ties to even
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else if (roundBits == halfway)
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absResult += absResult & 1;
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}
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}
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// Apply the signbit to (dst_t)abs(a).
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const dst_rep_t result = absResult | sign >> (srcBits - dstBits);
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return dstFromRep(result);
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}
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