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freebsd-skq/sys/dev/ath/ath_hal/ar5212/ar5413.c
Sam Leffler 59efa8b517 Overhaul regulatory support: 
o remove HAL_CHANNEL; convert the hal to use net80211 channels; this
  mostly involves mechanical changes to variable names and channel
  attribute macros
o gut HAL_CHANNEL_PRIVATE as most of the contents are now redundant
  with the net80211 channel available
o change api for ath_hal_init_channels: no more reglass id's, no more outdoor
  indication (was a noop), anM contents
o add ath_hal_getchannels to have the hal construct a channel list without
  altering runtime state; this is used to retrieve the calibration list for
  the device in ath_getradiocaps
o add ath_hal_set_channels to take a channel list and regulatory data from
  above and construct internal state to match (maps frequencies for 900MHz
  cards, setup for CTL lookups, etc)
o compact the private channel table: we keep one private channel
  per frequency instead of one per HAL_CHANNEL; this gives a big
  space savings and potentially improves ani and calibration by
  sharing state (to be seen; didn't see anything in testing); a new config
  option AH_MAXCHAN controls the table size (default to 96 which
  was chosen to be ~3x the largest expected size)
o shrink ani state and change to mirror private channel table (one entry per
  frequency indexed by ic_devdata)
o move ani state flags to private channel state
o remove country codes; use net80211 definitions instead
o remove GSM regulatory support; it's no longer needed now that we
  pass in channel lists from above
o consolidate ADHOC_NO_11A attribute with DISALLOW_ADHOC_11A
o simplify initial channel list construction based on the EEPROM contents;
  we preserve country code support for now but may want to just fallback
  to a WWR sku and dispatch the discovered country code up to user space
  so the channel list can be constructed using the master regdomain tables
o defer to net80211 for max antenna gain
o eliminate sorting of internal channel table; now that we use ic_devdata
  as an index, table lookups are O(1)
o remove internal copy of the country code; the public one is sufficient
o remove AH_SUPPORT_11D conditional compilation; we always support 11d
o remove ath_hal_ispublicsafetysku; not needed any more
o remove ath_hal_isgsmsku; no more GSM stuff
o move Conformance Test Limit (CTL) state from private channel to a lookup
  using per-band pointers cached in the private state block
o remove regulatory class id support; was unused and belongs in net80211
o fix channel list construction to set IEEE80211_CHAN_NOADHOC,
  IEEE80211_CHAN_NOHOSTAP, and IEEE80211_CHAN_4MSXMIT
o remove private channel flags CHANNEL_DFS and CHANNEL_4MS_LIMIT; these are
  now set in the constructed net80211 channel
o store CHANNEL_NFCREQUIRED (Noise Floor Required) channel attribute in one
  of the driver-private flag bits of the net80211 channel
o move 900MHz frequency mapping into the hal; the mapped frequency is stored
  in the private channel and used throughout the hal (no more mapping in the
  driver and/or net80211)
o remove ath_hal_mhz2ieee; it's no longer needed as net80211 does the
  calculation and available in the net80211 channel
o change noise floor calibration logic to work with compacted private channel
  table setup; this may require revisiting as we no longer can distinguish
  channel attributes (e.g. 11b vs 11g vs turbo) but since the data is used
  only to calculate status data we can live with it for now
o change ah_getChipPowerLimits internal method to operate on a single channel
  instead of all channels in the private channel table
o add ath_hal_gethwchannel to map a net80211 channel to a h/w frequency
  (always the same except for 900MHz channels)
o add HAL_EEBADREG and HAL_EEBADCC status codes to better identify regulatory
  problems
o remove CTRY_DEBUG and CTRY_DEFAULT enum's; these come from net80211 now
o change ath_hal_getwirelessmodes to really return wireless modes supported
  by the hardware (was previously applying regulatory constraints)
o return channel interference status with IEEE80211_CHANSTATE_CWINT (should
  change to a callback so hal api's can take const pointers)
o remove some #define's no longer needed with the inclusion of
  <net80211/_ieee80211.h>

Sponsored by:   Carlson Wireless
2009-01-28 18:00:22 +00:00

803 lines
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/*
* Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
* Copyright (c) 2002-2008 Atheros Communications, Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
* $FreeBSD$
*/
#include "opt_ah.h"
#include "ah.h"
#include "ah_internal.h"
#include "ah_eeprom_v3.h"
#include "ar5212/ar5212.h"
#include "ar5212/ar5212reg.h"
#include "ar5212/ar5212phy.h"
#define AH_5212_5413
#include "ar5212/ar5212.ini"
#define N(a) (sizeof(a)/sizeof(a[0]))
struct ar5413State {
RF_HAL_FUNCS base; /* public state, must be first */
uint16_t pcdacTable[PWR_TABLE_SIZE_2413];
uint32_t Bank1Data[N(ar5212Bank1_5413)];
uint32_t Bank2Data[N(ar5212Bank2_5413)];
uint32_t Bank3Data[N(ar5212Bank3_5413)];
uint32_t Bank6Data[N(ar5212Bank6_5413)];
uint32_t Bank7Data[N(ar5212Bank7_5413)];
/*
* Private state for reduced stack usage.
*/
/* filled out Vpd table for all pdGains (chanL) */
uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]
[MAX_PWR_RANGE_IN_HALF_DB];
/* filled out Vpd table for all pdGains (chanR) */
uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]
[MAX_PWR_RANGE_IN_HALF_DB];
/* filled out Vpd table for all pdGains (interpolated) */
uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]
[MAX_PWR_RANGE_IN_HALF_DB];
};
#define AR5413(ah) ((struct ar5413State *) AH5212(ah)->ah_rfHal)
extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
uint32_t numBits, uint32_t firstBit, uint32_t column);
static void
ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
int writes)
{
HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5413, modesIndex, writes);
HAL_INI_WRITE_ARRAY(ah, ar5212Common_5413, 1, writes);
HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5413, freqIndex, writes);
}
/*
* Take the MHz channel value and set the Channel value
*
* ASSUMES: Writes enabled to analog bus
*/
static HAL_BOOL
ar5413SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
{
uint16_t freq = ath_hal_gethwchannel(ah, chan);
uint32_t channelSel = 0;
uint32_t bModeSynth = 0;
uint32_t aModeRefSel = 0;
uint32_t reg32 = 0;
OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
if (freq < 4800) {
uint32_t txctl;
if (((freq - 2192) % 5) == 0) {
channelSel = ((freq - 672) * 2 - 3040)/10;
bModeSynth = 0;
} else if (((freq - 2224) % 5) == 0) {
channelSel = ((freq - 704) * 2 - 3040) / 10;
bModeSynth = 1;
} else {
HALDEBUG(ah, HAL_DEBUG_ANY,
"%s: invalid channel %u MHz\n",
__func__, freq);
return AH_FALSE;
}
channelSel = (channelSel << 2) & 0xff;
channelSel = ath_hal_reverseBits(channelSel, 8);
txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
if (freq == 2484) {
/* Enable channel spreading for channel 14 */
OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
} else {
OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
}
} else if (((freq % 5) == 2) && (freq <= 5435)) {
freq = freq - 2; /* Align to even 5MHz raster */
channelSel = ath_hal_reverseBits(
(uint32_t)(((freq - 4800)*10)/25 + 1), 8);
aModeRefSel = ath_hal_reverseBits(0, 2);
} else if ((freq % 20) == 0 && freq >= 5120) {
channelSel = ath_hal_reverseBits(
((freq - 4800) / 20 << 2), 8);
aModeRefSel = ath_hal_reverseBits(1, 2);
} else if ((freq % 10) == 0) {
channelSel = ath_hal_reverseBits(
((freq - 4800) / 10 << 1), 8);
aModeRefSel = ath_hal_reverseBits(1, 2);
} else if ((freq % 5) == 0) {
channelSel = ath_hal_reverseBits(
(freq - 4800) / 5, 8);
aModeRefSel = ath_hal_reverseBits(1, 2);
} else {
HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
__func__, freq);
return AH_FALSE;
}
reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
(1 << 12) | 0x1;
OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
reg32 >>= 8;
OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
AH_PRIVATE(ah)->ah_curchan = chan;
return AH_TRUE;
}
/*
* Reads EEPROM header info from device structure and programs
* all rf registers
*
* REQUIRES: Access to the analog rf device
*/
static HAL_BOOL
ar5413SetRfRegs(struct ath_hal *ah,
const struct ieee80211_channel *chan,
uint16_t modesIndex, uint16_t *rfXpdGain)
{
#define RF_BANK_SETUP(_priv, _ix, _col) do { \
int i; \
for (i = 0; i < N(ar5212Bank##_ix##_5413); i++) \
(_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5413[i][_col];\
} while (0)
struct ath_hal_5212 *ahp = AH5212(ah);
uint16_t freq = ath_hal_gethwchannel(ah, chan);
const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
uint16_t ob5GHz = 0, db5GHz = 0;
uint16_t ob2GHz = 0, db2GHz = 0;
struct ar5413State *priv = AR5413(ah);
int regWrites = 0;
HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
__func__, chan->ic_freq, chan->ic_flags, modesIndex);
HALASSERT(priv != AH_NULL);
/* Setup rf parameters */
switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) {
case IEEE80211_CHAN_A:
if (freq > 4000 && freq < 5260) {
ob5GHz = ee->ee_ob1;
db5GHz = ee->ee_db1;
} else if (freq >= 5260 && freq < 5500) {
ob5GHz = ee->ee_ob2;
db5GHz = ee->ee_db2;
} else if (freq >= 5500 && freq < 5725) {
ob5GHz = ee->ee_ob3;
db5GHz = ee->ee_db3;
} else if (freq >= 5725) {
ob5GHz = ee->ee_ob4;
db5GHz = ee->ee_db4;
} else {
/* XXX else */
}
break;
case IEEE80211_CHAN_B:
ob2GHz = ee->ee_obFor24;
db2GHz = ee->ee_dbFor24;
break;
case IEEE80211_CHAN_G:
case IEEE80211_CHAN_PUREG: /* NB: really 108G */
ob2GHz = ee->ee_obFor24g;
db2GHz = ee->ee_dbFor24g;
break;
default:
HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
__func__, chan->ic_flags);
return AH_FALSE;
}
/* Bank 1 Write */
RF_BANK_SETUP(priv, 1, 1);
/* Bank 2 Write */
RF_BANK_SETUP(priv, 2, modesIndex);
/* Bank 3 Write */
RF_BANK_SETUP(priv, 3, modesIndex);
/* Bank 6 Write */
RF_BANK_SETUP(priv, 6, modesIndex);
/* Only the 5 or 2 GHz OB/DB need to be set for a mode */
if (IEEE80211_IS_CHAN_2GHZ(chan)) {
ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 241, 0);
ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 238, 0);
/* TODO - only for Eagle 1.0 2GHz - remove for production */
/* XXX: but without this bit G doesn't work. */
ar5212ModifyRfBuffer(priv->Bank6Data, 1 , 1, 291, 2);
/* Optimum value for rf_pwd_iclobuf2G for PCIe chips only */
if (IS_PCIE(ah)) {
ar5212ModifyRfBuffer(priv->Bank6Data, ath_hal_reverseBits(6, 3),
3, 131, 3);
}
} else {
ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 247, 0);
ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 244, 0);
}
/* Bank 7 Setup */
RF_BANK_SETUP(priv, 7, modesIndex);
/* Write Analog registers */
HAL_INI_WRITE_BANK(ah, ar5212Bank1_5413, priv->Bank1Data, regWrites);
HAL_INI_WRITE_BANK(ah, ar5212Bank2_5413, priv->Bank2Data, regWrites);
HAL_INI_WRITE_BANK(ah, ar5212Bank3_5413, priv->Bank3Data, regWrites);
HAL_INI_WRITE_BANK(ah, ar5212Bank6_5413, priv->Bank6Data, regWrites);
HAL_INI_WRITE_BANK(ah, ar5212Bank7_5413, priv->Bank7Data, regWrites);
/* Now that we have reprogrammed rfgain value, clear the flag. */
ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
return AH_TRUE;
#undef RF_BANK_SETUP
}
/*
* Return a reference to the requested RF Bank.
*/
static uint32_t *
ar5413GetRfBank(struct ath_hal *ah, int bank)
{
struct ar5413State *priv = AR5413(ah);
HALASSERT(priv != AH_NULL);
switch (bank) {
case 1: return priv->Bank1Data;
case 2: return priv->Bank2Data;
case 3: return priv->Bank3Data;
case 6: return priv->Bank6Data;
case 7: return priv->Bank7Data;
}
HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
__func__, bank);
return AH_NULL;
}
/*
* Return indices surrounding the value in sorted integer lists.
*
* NB: the input list is assumed to be sorted in ascending order
*/
static void
GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
uint32_t *vlo, uint32_t *vhi)
{
int16_t target = v;
const uint16_t *ep = lp+listSize;
const uint16_t *tp;
/*
* Check first and last elements for out-of-bounds conditions.
*/
if (target < lp[0]) {
*vlo = *vhi = 0;
return;
}
if (target >= ep[-1]) {
*vlo = *vhi = listSize - 1;
return;
}
/* look for value being near or between 2 values in list */
for (tp = lp; tp < ep; tp++) {
/*
* If value is close to the current value of the list
* then target is not between values, it is one of the values
*/
if (*tp == target) {
*vlo = *vhi = tp - (const uint16_t *) lp;
return;
}
/*
* Look for value being between current value and next value
* if so return these 2 values
*/
if (target < tp[1]) {
*vlo = tp - (const uint16_t *) lp;
*vhi = *vlo + 1;
return;
}
}
}
/*
* Fill the Vpdlist for indices Pmax-Pmin
*/
static HAL_BOOL
ar5413FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,
const int16_t *pwrList, const uint16_t *VpdList,
uint16_t numIntercepts,
uint16_t retVpdList[][64])
{
uint16_t ii, jj, kk;
int16_t currPwr = (int16_t)(2*Pmin);
/* since Pmin is pwr*2 and pwrList is 4*pwr */
uint32_t idxL, idxR;
ii = 0;
jj = 0;
if (numIntercepts < 2)
return AH_FALSE;
while (ii <= (uint16_t)(Pmax - Pmin)) {
GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,
numIntercepts, &(idxL), &(idxR));
if (idxR < 1)
idxR = 1; /* extrapolate below */
if (idxL == (uint32_t)(numIntercepts - 1))
idxL = numIntercepts - 2; /* extrapolate above */
if (pwrList[idxL] == pwrList[idxR])
kk = VpdList[idxL];
else
kk = (uint16_t)
(((currPwr - pwrList[idxL])*VpdList[idxR]+
(pwrList[idxR] - currPwr)*VpdList[idxL])/
(pwrList[idxR] - pwrList[idxL]));
retVpdList[pdGainIdx][ii] = kk;
ii++;
currPwr += 2; /* half dB steps */
}
return AH_TRUE;
}
/*
* Returns interpolated or the scaled up interpolated value
*/
static int16_t
interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
int16_t targetLeft, int16_t targetRight)
{
int16_t rv;
if (srcRight != srcLeft) {
rv = ((target - srcLeft)*targetRight +
(srcRight - target)*targetLeft) / (srcRight - srcLeft);
} else {
rv = targetLeft;
}
return rv;
}
/*
* Uses the data points read from EEPROM to reconstruct the pdadc power table
* Called by ar5413SetPowerTable()
*/
static int
ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
const RAW_DATA_STRUCT_2413 *pRawDataset,
uint16_t pdGainOverlap_t2,
int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],
uint16_t pPdGainValues[], uint16_t pPDADCValues[])
{
struct ar5413State *priv = AR5413(ah);
#define VpdTable_L priv->vpdTable_L
#define VpdTable_R priv->vpdTable_R
#define VpdTable_I priv->vpdTable_I
uint32_t ii, jj, kk;
int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
uint32_t idxL, idxR;
uint32_t numPdGainsUsed = 0;
/*
* If desired to support -ve power levels in future, just
* change pwr_I_0 to signed 5-bits.
*/
int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
/* to accomodate -ve power levels later on. */
int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
/* to accomodate -ve power levels later on */
uint16_t numVpd = 0;
uint16_t Vpd_step;
int16_t tmpVal ;
uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
/* Get upper lower index */
GetLowerUpperIndex(channel, pRawDataset->pChannels,
pRawDataset->numChannels, &(idxL), &(idxR));
for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
/* work backwards 'cause highest pdGain for lowest power */
numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
if (numVpd > 0) {
pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
}
Pmin_t2[numPdGainsUsed] = (int16_t)
(Pmin_t2[numPdGainsUsed] / 2);
Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
Pmax_t2[numPdGainsUsed] =
pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
ar5413FillVpdTable(
numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
&(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
&(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
);
ar5413FillVpdTable(
numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
&(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
&(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
);
for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
VpdTable_I[numPdGainsUsed][kk] =
interpolate_signed(
channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
(int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
}
/* fill VpdTable_I for this pdGain */
numPdGainsUsed++;
}
/* if this pdGain is used */
}
*pMinCalPower = Pmin_t2[0];
kk = 0; /* index for the final table */
for (ii = 0; ii < numPdGainsUsed; ii++) {
if (ii == (numPdGainsUsed - 1))
pPdGainBoundaries[ii] = Pmax_t2[ii] +
PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
else
pPdGainBoundaries[ii] = (uint16_t)
((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
if (pPdGainBoundaries[ii] > 63) {
HALDEBUG(ah, HAL_DEBUG_ANY,
"%s: clamp pPdGainBoundaries[%d] %d\n",
__func__, ii, pPdGainBoundaries[ii]);/*XXX*/
pPdGainBoundaries[ii] = 63;
}
/* Find starting index for this pdGain */
if (ii == 0)
ss = 0; /* for the first pdGain, start from index 0 */
else
ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
pdGainOverlap_t2;
Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
/*
*-ve ss indicates need to extrapolate data below for this pdGain
*/
while (ss < 0) {
tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
ss++;
}
sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
while (ss < (int16_t)maxIndex)
pPDADCValues[kk++] = VpdTable_I[ii][ss++];
Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
VpdTable_I[ii][sizeCurrVpdTable-2]);
Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
/*
* for last gain, pdGainBoundary == Pmax_t2, so will
* have to extrapolate
*/
if (tgtIndex > maxIndex) { /* need to extrapolate above */
while(ss < (int16_t)tgtIndex) {
tmpVal = (uint16_t)
(VpdTable_I[ii][sizeCurrVpdTable-1] +
(ss-maxIndex)*Vpd_step);
pPDADCValues[kk++] = (tmpVal > 127) ?
127 : tmpVal;
ss++;
}
} /* extrapolated above */
} /* for all pdGainUsed */
while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
ii++;
}
while (kk < 128) {
pPDADCValues[kk] = pPDADCValues[kk-1];
kk++;
}
return numPdGainsUsed;
#undef VpdTable_L
#undef VpdTable_R
#undef VpdTable_I
}
static HAL_BOOL
ar5413SetPowerTable(struct ath_hal *ah,
int16_t *minPower, int16_t *maxPower,
const struct ieee80211_channel *chan,
uint16_t *rfXpdGain)
{
struct ath_hal_5212 *ahp = AH5212(ah);
uint16_t freq = ath_hal_gethwchannel(ah, chan);
const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
uint16_t pdGainOverlap_t2;
int16_t minCalPower5413_t2;
uint16_t *pdadcValues = ahp->ah_pcdacTable;
uint16_t gainBoundaries[4];
uint32_t reg32, regoffset;
int i, numPdGainsUsed;
#ifndef AH_USE_INIPDGAIN
uint32_t tpcrg1;
#endif
HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",
__func__, chan->ic_freq, chan->ic_flags);
if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
else if (IEEE80211_IS_CHAN_B(chan))
pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
else {
HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan));
pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];
}
pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
numPdGainsUsed = ar5413getGainBoundariesAndPdadcsForPowers(ah,
freq, pRawDataset, pdGainOverlap_t2,
&minCalPower5413_t2,gainBoundaries, rfXpdGain, pdadcValues);
HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);
#ifdef AH_USE_INIPDGAIN
/*
* Use pd_gains curve from eeprom; Atheros always uses
* the default curve from the ini file but some vendors
* (e.g. Zcomax) want to override this curve and not
* honoring their settings results in tx power 5dBm low.
*/
OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
(pRawDataset->pDataPerChannel[0].numPdGains - 1));
#else
tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)
| SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);
switch (numPdGainsUsed) {
case 3:
tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;
tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);
/* fall thru... */
case 2:
tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;
tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);
/* fall thru... */
case 1:
tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;
tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);
break;
}
#ifdef AH_DEBUG
if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "
"pd_gains (default 0x%x, calculated 0x%x)\n",
__func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
#endif
OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);
#endif
/*
* Note the pdadc table may not start at 0 dBm power, could be
* negative or greater than 0. Need to offset the power
* values by the amount of minPower for griffin
*/
if (minCalPower5413_t2 != 0)
ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower5413_t2);
else
ahp->ah_txPowerIndexOffset = 0;
/* Finally, write the power values into the baseband power table */
regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
for (i = 0; i < 32; i++) {
reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |
((pdadcValues[4*i + 1] & 0xFF) << 8) |
((pdadcValues[4*i + 2] & 0xFF) << 16) |
((pdadcValues[4*i + 3] & 0xFF) << 24) ;
OS_REG_WRITE(ah, regoffset, reg32);
regoffset += 4;
}
OS_REG_WRITE(ah, AR_PHY_TPCRG5,
SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
return AH_TRUE;
}
static int16_t
ar5413GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
{
uint32_t ii,jj;
uint16_t Pmin=0,numVpd;
for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
/* work backwards 'cause highest pdGain for lowest power */
numVpd = data->pDataPerPDGain[jj].numVpd;
if (numVpd > 0) {
Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
return(Pmin);
}
}
return(Pmin);
}
static int16_t
ar5413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
{
uint32_t ii;
uint16_t Pmax=0,numVpd;
for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
/* work forwards cuase lowest pdGain for highest power */
numVpd = data->pDataPerPDGain[ii].numVpd;
if (numVpd > 0) {
Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
return(Pmax);
}
}
return(Pmax);
}
static HAL_BOOL
ar5413GetChannelMaxMinPower(struct ath_hal *ah,
const struct ieee80211_channel *chan,
int16_t *maxPow, int16_t *minPow)
{
uint16_t freq = chan->ic_freq; /* NB: never mapped */
const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
const RAW_DATA_PER_CHANNEL_2413 *data=AH_NULL;
uint16_t numChannels;
int totalD,totalF, totalMin,last, i;
*maxPow = 0;
if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
else if (IEEE80211_IS_CHAN_B(chan))
pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
else {
HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan));
pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];
}
numChannels = pRawDataset->numChannels;
data = pRawDataset->pDataPerChannel;
/* Make sure the channel is in the range of the TP values
* (freq piers)
*/
if (numChannels < 1)
return(AH_FALSE);
if ((freq < data[0].channelValue) ||
(freq > data[numChannels-1].channelValue)) {
if (freq < data[0].channelValue) {
*maxPow = ar5413GetMaxPower(ah, &data[0]);
*minPow = ar5413GetMinPower(ah, &data[0]);
return(AH_TRUE);
} else {
*maxPow = ar5413GetMaxPower(ah, &data[numChannels - 1]);
*minPow = ar5413GetMinPower(ah, &data[numChannels - 1]);
return(AH_TRUE);
}
}
/* Linearly interpolate the power value now */
for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);
last = i++);
totalD = data[i].channelValue - data[last].channelValue;
if (totalD > 0) {
totalF = ar5413GetMaxPower(ah, &data[i]) - ar5413GetMaxPower(ah, &data[last]);
*maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +
ar5413GetMaxPower(ah, &data[last])*totalD)/totalD);
totalMin = ar5413GetMinPower(ah, &data[i]) - ar5413GetMinPower(ah, &data[last]);
*minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +
ar5413GetMinPower(ah, &data[last])*totalD)/totalD);
return(AH_TRUE);
} else {
if (freq == data[i].channelValue) {
*maxPow = ar5413GetMaxPower(ah, &data[i]);
*minPow = ar5413GetMinPower(ah, &data[i]);
return(AH_TRUE);
} else
return(AH_FALSE);
}
}
/*
* Free memory for analog bank scratch buffers
*/
static void
ar5413RfDetach(struct ath_hal *ah)
{
struct ath_hal_5212 *ahp = AH5212(ah);
HALASSERT(ahp->ah_rfHal != AH_NULL);
ath_hal_free(ahp->ah_rfHal);
ahp->ah_rfHal = AH_NULL;
}
/*
* Allocate memory for analog bank scratch buffers
* Scratch Buffer will be reinitialized every reset so no need to zero now
*/
static HAL_BOOL
ar5413RfAttach(struct ath_hal *ah, HAL_STATUS *status)
{
struct ath_hal_5212 *ahp = AH5212(ah);
struct ar5413State *priv;
HALASSERT(ah->ah_magic == AR5212_MAGIC);
HALASSERT(ahp->ah_rfHal == AH_NULL);
priv = ath_hal_malloc(sizeof(struct ar5413State));
if (priv == AH_NULL) {
HALDEBUG(ah, HAL_DEBUG_ANY,
"%s: cannot allocate private state\n", __func__);
*status = HAL_ENOMEM; /* XXX */
return AH_FALSE;
}
priv->base.rfDetach = ar5413RfDetach;
priv->base.writeRegs = ar5413WriteRegs;
priv->base.getRfBank = ar5413GetRfBank;
priv->base.setChannel = ar5413SetChannel;
priv->base.setRfRegs = ar5413SetRfRegs;
priv->base.setPowerTable = ar5413SetPowerTable;
priv->base.getChannelMaxMinPower = ar5413GetChannelMaxMinPower;
priv->base.getNfAdjust = ar5212GetNfAdjust;
ahp->ah_pcdacTable = priv->pcdacTable;
ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
ahp->ah_rfHal = &priv->base;
return AH_TRUE;
}
static HAL_BOOL
ar5413Probe(struct ath_hal *ah)
{
return IS_5413(ah);
}
AH_RF(RF5413, ar5413Probe, ar5413RfAttach);
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