3ee9e586b3
sun4v nexus(4) in turn is based on): o Change nexus(4) to manage the resources of its children so the respective device drivers don't need to figure them out of OFW themselves. o Change nexus(4) to provide the ofw_bus KOBJ interface instead of using IVARs for supplying the OFW node and the subset of standard properties of its children. Together with the previous change this also allows to fully take advantage of newbus in that drivers like fhc(4), which attach on multiple parent busses, no longer require different bus front-ends as obtaining the OFW node and properties as well as resource allocation works the same for all supported busses. As such this change also is part 4/4 of allowing creator(4) to work in USIII-based machines as it allows this driver to attach on both nexus(4) and upa(4). On the other hand removing these IVARs breaks API compatibility with the powerpc nexus(4) but which isn't that bad as a) sparc64 currently doesn't share any device driver hanging off of nexus(4) with powerpc and b) they were no longer compatible regarding OFW-related extensions at the pci(4) level since quite some time. o Provide bus_get_dma_tag methods in nexus(4) and its children in order to handle DMA tags in a hierarchical way and get rid of the sparc64_root_dma_tag kludge. Together with the previous two items this changes also allows to completely get rid of the nexus(4) IVAR interface. It also includes: - pushing the constraints previously specified by the nexus_dmatag down into the DMA tags of psycho(4) and sbus(4) as it's their IOMMUs which induce these restrictions (and nothing at the nexus(4) or anything that would warrant specifying them there), - fixing some obviously wrong constraints of the psycho(4) and sbus(4) DMA tags, which happened to not actually be used with the sparc64_root_dma_tag kludge in place and therefore didn't cause problems so far, - replacing magic constants for constraints with macros as far as it is obvious as to where they come from. This doesn't include taking advantage of the newbus way to get the parent DMA tags implemented by this change in order to divorce the IOTSBs of the PCI and SBus IOMMUs or for implementing the workaround for the DMA sync bug in Sabre (and Tomatillo) bridges, yet, though. o Get rid of the notion that nexus(4) (mostly) reflects an UPA bus by replacing ofw_upa.h and with ofw_nexus.h (which was repo-copied from ofw_upa.h) and renaming its content, which actually applies to all of Fireplane/Safari, JBus and UPA (in the host bus case), as appropriate. o Just use M_DEVBUF instead of a separate M_NEXUS malloc type for allocating the device info for the children of nexus(4). This is done in order to not need to export M_NEXUS when deriving drivers for subordinate busses from the nexus(4) class. o Use the DEFINE_CLASS_0() macro to declare the nexus(4) driver so we can derive subclasses from it. o Const'ify the nexus_excl_name and nexus_excl_type arrays as well as add 'associations' and 'rsc', which are pseudo-devices without resources and therefore of no real interest for nexus(4), to the former. o Let the nexus(4) device memory rman manage the entire 64-bit address space instead of just the UPA_MEMSTART to UPA_MEMEND subregion as Fireplane/Safari- and JBus-based machines use multiple ranges, which can't be as easily divided as in the case of UPA (limiting the address space only served for sanity checking anyway). o Use M_WAITOK instead of M_NOWAIT when allocating the device info for children of nexus(4) in order to give one less opportunity for adding devices to nexus(4) to fail. o While adapting the drivers affected by the above nexus(4) changes, change them to take advantage of rman_get_rid() instead of caching the RIDs assigned to allocated resources, now that the RIDs of resources are correctly set. o In iommu(4) and nexus(4) replace hard-coded functions names, which actually became outdated in several places, in panic strings and status massages with __func__. [1] o Use driver_filter_t in prototypes where appropriate. o Add my copyright to creator(4), fhc(4), nexus(4), psycho(4) and sbus(4) as I changed considerable amounts of these drivers as well as added a bunch of new features, workarounds for silicon bugs etc. o Fix some white space nits. Due to lack of access to Exx00 hardware, these changes, i.e. central(4) and fhc(4), couldn't be runtime tested on such a machine. Exx00 are currently reported to panic before trying to attach nexus(4) anyway though. PR: 76052 [1] Approved by: re (kensmith)
969 lines
29 KiB
C
969 lines
29 KiB
C
/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Lawrence Berkeley Laboratory.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1999 Eduardo Horvath
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* Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>.
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* Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)sbus.c 8.1 (Berkeley) 6/11/93
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* from: NetBSD: sbus.c,v 1.46 2001/10/07 20:30:41 eeh Exp
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* SBus support.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/pcpu.h>
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#include <sys/reboot.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#include <machine/bus_private.h>
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#include <machine/iommureg.h>
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#include <machine/bus_common.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <machine/iommuvar.h>
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#include <sparc64/sbus/ofw_sbus.h>
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#include <sparc64/sbus/sbusreg.h>
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#include <sparc64/sbus/sbusvar.h>
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struct sbus_devinfo {
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int sdi_burstsz;
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int sdi_clockfreq;
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int sdi_slot;
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struct ofw_bus_devinfo sdi_obdinfo;
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struct resource_list sdi_rl;
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};
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/* Range descriptor, allocated for each sc_range. */
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struct sbus_rd {
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bus_addr_t rd_poffset;
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bus_addr_t rd_pend;
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int rd_slot;
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bus_addr_t rd_coffset;
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bus_addr_t rd_cend;
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struct rman rd_rman;
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bus_space_handle_t rd_bushandle;
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struct resource *rd_res;
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};
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struct sbus_softc {
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bus_space_tag_t sc_bustag;
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bus_space_handle_t sc_bushandle;
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bus_dma_tag_t sc_cdmatag;
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bus_space_tag_t sc_cbustag;
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int sc_clockfreq; /* clock frequency (in Hz) */
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int sc_nrange;
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struct sbus_rd *sc_rd;
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int sc_burst; /* burst transfer sizes supp. */
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struct resource *sc_sysio_res;
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int sc_ign; /* IGN for this sysio */
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struct iommu_state sc_is; /* IOMMU state (iommuvar.h) */
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struct resource *sc_ot_ires;
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void *sc_ot_ihand;
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struct resource *sc_pf_ires;
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void *sc_pf_ihand;
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};
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struct sbus_clr {
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struct sbus_softc *scl_sc;
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bus_addr_t scl_clr; /* clear register */
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driver_filter_t *scl_handler; /* handler to call */
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void *scl_arg; /* argument for the handler */
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void *scl_cookie; /* parent bus int. cookie */
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};
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#define SYSIO_READ8(sc, off) \
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bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off))
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#define SYSIO_WRITE8(sc, off, v) \
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bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v))
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static device_probe_t sbus_probe;
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static device_attach_t sbus_attach;
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static bus_print_child_t sbus_print_child;
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static bus_probe_nomatch_t sbus_probe_nomatch;
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static bus_read_ivar_t sbus_read_ivar;
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static bus_get_resource_list_t sbus_get_resource_list;
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static bus_setup_intr_t sbus_setup_intr;
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static bus_teardown_intr_t sbus_teardown_intr;
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static bus_alloc_resource_t sbus_alloc_resource;
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static bus_release_resource_t sbus_release_resource;
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static bus_activate_resource_t sbus_activate_resource;
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static bus_deactivate_resource_t sbus_deactivate_resource;
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static bus_get_dma_tag_t sbus_get_dma_tag;
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static ofw_bus_get_devinfo_t sbus_get_devinfo;
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static int sbus_inlist(const char *, const char **);
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static struct sbus_devinfo * sbus_setup_dinfo(device_t, struct sbus_softc *,
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phandle_t);
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static void sbus_destroy_dinfo(struct sbus_devinfo *);
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static driver_filter_t sbus_intr_stub;
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static bus_space_tag_t sbus_alloc_bustag(struct sbus_softc *);
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static driver_filter_t sbus_overtemp;
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static driver_filter_t sbus_pwrfail;
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static int sbus_print_res(struct sbus_devinfo *);
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static device_method_t sbus_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, sbus_probe),
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DEVMETHOD(device_attach, sbus_attach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* Bus interface */
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DEVMETHOD(bus_print_child, sbus_print_child),
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DEVMETHOD(bus_probe_nomatch, sbus_probe_nomatch),
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DEVMETHOD(bus_read_ivar, sbus_read_ivar),
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DEVMETHOD(bus_setup_intr, sbus_setup_intr),
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DEVMETHOD(bus_teardown_intr, sbus_teardown_intr),
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DEVMETHOD(bus_alloc_resource, sbus_alloc_resource),
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DEVMETHOD(bus_activate_resource, sbus_activate_resource),
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DEVMETHOD(bus_deactivate_resource, sbus_deactivate_resource),
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DEVMETHOD(bus_release_resource, sbus_release_resource),
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DEVMETHOD(bus_get_resource_list, sbus_get_resource_list),
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DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
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DEVMETHOD(bus_get_dma_tag, sbus_get_dma_tag),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_devinfo, sbus_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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{ 0, 0 }
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};
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static driver_t sbus_driver = {
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"sbus",
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sbus_methods,
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sizeof(struct sbus_softc),
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};
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static devclass_t sbus_devclass;
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DRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, 0, 0);
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#define OFW_SBUS_TYPE "sbus"
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#define OFW_SBUS_NAME "sbus"
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static const char *sbus_order_first[] = {
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"auxio",
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"dma",
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NULL
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};
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static int
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sbus_inlist(const char *name, const char **list)
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{
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int i;
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if (name == NULL)
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return (0);
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for (i = 0; list[i] != NULL; i++) {
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if (strcmp(name, list[i]) == 0)
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return (1);
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}
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return (0);
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}
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static int
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sbus_probe(device_t dev)
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{
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const char *t;
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t = ofw_bus_get_type(dev);
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if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) &&
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strcmp(ofw_bus_get_name(dev), OFW_SBUS_NAME) != 0)
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return (ENXIO);
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device_set_desc(dev, "U2S UPA-SBus bridge");
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return (0);
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}
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static int
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sbus_attach(device_t dev)
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{
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struct sbus_softc *sc;
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struct sbus_devinfo *sdi;
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struct sbus_ranges *range;
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struct resource *res;
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struct resource_list *rl;
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device_t cdev;
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bus_addr_t phys;
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bus_size_t size;
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char *name;
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phandle_t child, node;
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u_int64_t mr;
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int clock, i, intr, rid;
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sc = device_get_softc(dev);
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node = ofw_bus_get_node(dev);
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rid = 0;
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sc->sc_sysio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->sc_sysio_res == NULL)
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panic("%s: cannot allocate device memory", __func__);
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sc->sc_bustag = rman_get_bustag(sc->sc_sysio_res);
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sc->sc_bushandle = rman_get_bushandle(sc->sc_sysio_res);
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if (OF_getprop(node, "interrupts", &intr, sizeof(intr)) == -1)
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panic("%s: cannot get IGN", __func__);
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sc->sc_ign = (intr & INTMAP_IGN_MASK) >> INTMAP_IGN_SHIFT;
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sc->sc_cbustag = sbus_alloc_bustag(sc);
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/*
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* Record clock frequency for synchronous SCSI.
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* IS THIS THE CORRECT DEFAULT??
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*/
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if (OF_getprop(node, "clock-frequency", &clock, sizeof(clock)) == -1)
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clock = 25000000;
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sc->sc_clockfreq = clock;
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clock /= 1000;
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device_printf(dev, "clock %d.%03d MHz\n", clock / 1000, clock % 1000);
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/*
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* Collect address translations from the OBP.
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*/
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if ((sc->sc_nrange = OF_getprop_alloc(node, "ranges",
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sizeof(*range), (void **)&range)) == -1) {
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panic("%s: error getting ranges property", __func__);
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}
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sc->sc_rd = (struct sbus_rd *)malloc(sizeof(*sc->sc_rd) * sc->sc_nrange,
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M_DEVBUF, M_NOWAIT);
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if (sc->sc_rd == NULL)
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panic("%s: cannot allocate rmans", __func__);
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/*
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* Preallocate all space that the SBus bridge decodes, so that nothing
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* else gets in the way; set up rmans etc.
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*/
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rl = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev);
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for (i = 0; i < sc->sc_nrange; i++) {
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phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32);
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size = range[i].size;
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sc->sc_rd[i].rd_slot = range[i].cspace;
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sc->sc_rd[i].rd_coffset = range[i].coffset;
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sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size;
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rid = resource_list_add_next(rl, SYS_RES_MEMORY, phys,
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phys + size - 1, size);
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if ((res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE)) == NULL)
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panic("%s: cannot allocate decoded range", __func__);
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sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res);
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sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY;
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sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory";
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if (rman_init(&sc->sc_rd[i].rd_rman) != 0 ||
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rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0)
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panic("%s: failed to set up memory rman", __func__);
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sc->sc_rd[i].rd_poffset = phys;
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sc->sc_rd[i].rd_pend = phys + size;
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sc->sc_rd[i].rd_res = res;
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}
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free(range, M_OFWPROP);
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/*
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* Get the SBus burst transfer size if burst transfers are supported.
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* XXX: is the default correct?
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*/
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if (OF_getprop(node, "burst-sizes", &sc->sc_burst,
|
|
sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0)
|
|
sc->sc_burst = SBUS_BURST_DEF;
|
|
|
|
/* initalise the IOMMU */
|
|
|
|
/* punch in our copies */
|
|
sc->sc_is.is_bustag = sc->sc_bustag;
|
|
sc->sc_is.is_bushandle = sc->sc_bushandle;
|
|
sc->sc_is.is_iommu = SBR_IOMMU;
|
|
sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG;
|
|
sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG;
|
|
sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG;
|
|
sc->sc_is.is_dva = SBR_IOMMU_SVADIAG;
|
|
sc->sc_is.is_dtcmp = 0;
|
|
sc->sc_is.is_sb[0] = SBR_STRBUF;
|
|
sc->sc_is.is_sb[1] = 0;
|
|
|
|
/* give us a nice name.. */
|
|
name = (char *)malloc(32, M_DEVBUF, M_NOWAIT);
|
|
if (name == NULL)
|
|
panic("%s: cannot malloc iommu name", __func__);
|
|
snprintf(name, 32, "%s dvma", device_get_name(dev));
|
|
|
|
/*
|
|
* Note: the SBus IOMMU ignores the high bits of an address, so a NULL
|
|
* DMA pointer will be translated by the first page of the IOTSB.
|
|
* To detect bugs we'll allocate and ignore the first entry.
|
|
*/
|
|
iommu_init(name, &sc->sc_is, 3, -1, 1);
|
|
|
|
/* Create the DMA tag. */
|
|
if (bus_dma_tag_create(bus_get_dma_tag(dev), 8, 0, IOMMU_MAXADDR, ~0,
|
|
NULL, NULL, IOMMU_MAXADDR, 0xff, 0xffffffff, 0, NULL, NULL,
|
|
&sc->sc_cdmatag) != 0)
|
|
panic("%s: bus_dma_tag_create failed", __func__);
|
|
/* Customize the tag. */
|
|
sc->sc_cdmatag->dt_cookie = &sc->sc_is;
|
|
sc->sc_cdmatag->dt_mt = &iommu_dma_methods;
|
|
|
|
/* Enable the over-temperature and power-fail interrupts. */
|
|
rid = 4;
|
|
mr = SYSIO_READ8(sc, SBR_THERM_INT_MAP);
|
|
sc->sc_ot_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
|
|
RF_ACTIVE);
|
|
if (sc->sc_ot_ires == NULL ||
|
|
rman_get_start(sc->sc_ot_ires) != INTVEC(mr) ||
|
|
bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC,
|
|
sbus_overtemp, NULL, sc, &sc->sc_ot_ihand) != 0)
|
|
panic("%s: failed to set up temperature interrupt", __func__);
|
|
SYSIO_WRITE8(sc, SBR_THERM_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid)));
|
|
rid = 3;
|
|
mr = SYSIO_READ8(sc, SBR_POWER_INT_MAP);
|
|
sc->sc_pf_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
|
|
RF_ACTIVE);
|
|
if (sc->sc_pf_ires == NULL ||
|
|
rman_get_start(sc->sc_pf_ires) != INTVEC(mr) ||
|
|
bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC,
|
|
sbus_pwrfail, NULL, sc, &sc->sc_pf_ihand) != 0)
|
|
panic("%s: failed to set up power fail interrupt", __func__);
|
|
SYSIO_WRITE8(sc, SBR_POWER_INT_MAP, INTMAP_ENABLE(mr, PCPU_GET(mid)));
|
|
|
|
/* Initialize the counter-timer. */
|
|
sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, SBR_TC0);
|
|
|
|
/*
|
|
* Loop through ROM children, fixing any relative addresses
|
|
* and then configuring each device.
|
|
*/
|
|
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
|
|
if ((sdi = sbus_setup_dinfo(dev, sc, child)) == NULL)
|
|
continue;
|
|
/*
|
|
* For devices where there are variants that are actually
|
|
* split into two SBus devices (as opposed to the first
|
|
* half of the device being a SBus device and the second
|
|
* half hanging off of the first one) like 'auxio' and
|
|
* 'SUNW,fdtwo' or 'dma' and 'esp' probe the SBus device
|
|
* which is a prerequisite to the driver attaching to the
|
|
* second one with a lower order. Saves us from dealing
|
|
* with different probe orders in the respective device
|
|
* drivers which generally is more hackish.
|
|
*/
|
|
cdev = device_add_child_ordered(dev, (OF_child(child) == 0 &&
|
|
sbus_inlist(sdi->sdi_obdinfo.obd_name, sbus_order_first)) ?
|
|
SBUS_ORDER_FIRST : SBUS_ORDER_NORMAL, NULL, -1);
|
|
if (cdev == NULL) {
|
|
device_printf(dev,
|
|
"<%s>: device_add_child_ordered failed\n",
|
|
sdi->sdi_obdinfo.obd_name);
|
|
sbus_destroy_dinfo(sdi);
|
|
continue;
|
|
}
|
|
device_set_ivars(cdev, sdi);
|
|
}
|
|
return (bus_generic_attach(dev));
|
|
}
|
|
|
|
static struct sbus_devinfo *
|
|
sbus_setup_dinfo(device_t dev, struct sbus_softc *sc, phandle_t node)
|
|
{
|
|
struct sbus_devinfo *sdi;
|
|
struct sbus_regs *reg;
|
|
u_int32_t base, iv, *intr;
|
|
int i, nreg, nintr, slot, rslot;
|
|
|
|
sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK);
|
|
if (ofw_bus_gen_setup_devinfo(&sdi->sdi_obdinfo, node) != 0) {
|
|
free(sdi, M_DEVBUF);
|
|
return (NULL);
|
|
}
|
|
resource_list_init(&sdi->sdi_rl);
|
|
slot = -1;
|
|
nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)®);
|
|
if (nreg == -1) {
|
|
if (sdi->sdi_obdinfo.obd_type == NULL ||
|
|
strcmp(sdi->sdi_obdinfo.obd_type, "hierarchical") != 0) {
|
|
device_printf(dev, "<%s>: incomplete\n",
|
|
sdi->sdi_obdinfo.obd_name);
|
|
goto fail;
|
|
}
|
|
} else {
|
|
for (i = 0; i < nreg; i++) {
|
|
base = reg[i].sbr_offset;
|
|
if (SBUS_ABS(base)) {
|
|
rslot = SBUS_ABS_TO_SLOT(base);
|
|
base = SBUS_ABS_TO_OFFSET(base);
|
|
} else
|
|
rslot = reg[i].sbr_slot;
|
|
if (slot != -1 && slot != rslot) {
|
|
device_printf(dev, "<%s>: multiple slots\n",
|
|
sdi->sdi_obdinfo.obd_name);
|
|
free(reg, M_OFWPROP);
|
|
goto fail;
|
|
}
|
|
slot = rslot;
|
|
|
|
resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i,
|
|
base, base + reg[i].sbr_size, reg[i].sbr_size);
|
|
}
|
|
free(reg, M_OFWPROP);
|
|
}
|
|
sdi->sdi_slot = slot;
|
|
|
|
/*
|
|
* The `interrupts' property contains the SBus interrupt level.
|
|
*/
|
|
nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr),
|
|
(void **)&intr);
|
|
if (nintr != -1) {
|
|
for (i = 0; i < nintr; i++) {
|
|
iv = intr[i];
|
|
/*
|
|
* SBus card devices need the slot number encoded into
|
|
* the vector as this is generally not done.
|
|
*/
|
|
if ((iv & INTMAP_OBIO_MASK) == 0)
|
|
iv |= slot << 3;
|
|
/* Set the ign as appropriate. */
|
|
iv |= sc->sc_ign << INTMAP_IGN_SHIFT;
|
|
resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i,
|
|
iv, iv, 1);
|
|
}
|
|
free(intr, M_OFWPROP);
|
|
}
|
|
if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz,
|
|
sizeof(sdi->sdi_burstsz)) == -1)
|
|
sdi->sdi_burstsz = sc->sc_burst;
|
|
else
|
|
sdi->sdi_burstsz &= sc->sc_burst;
|
|
if (OF_getprop(node, "clock-frequency", &sdi->sdi_clockfreq,
|
|
sizeof(sdi->sdi_clockfreq)) == -1)
|
|
sdi->sdi_clockfreq = sc->sc_clockfreq;
|
|
|
|
return (sdi);
|
|
|
|
fail:
|
|
sbus_destroy_dinfo(sdi);
|
|
return (NULL);
|
|
}
|
|
|
|
static void
|
|
sbus_destroy_dinfo(struct sbus_devinfo *dinfo)
|
|
{
|
|
|
|
resource_list_free(&dinfo->sdi_rl);
|
|
ofw_bus_gen_destroy_devinfo(&dinfo->sdi_obdinfo);
|
|
free(dinfo, M_DEVBUF);
|
|
}
|
|
|
|
static int
|
|
sbus_print_child(device_t dev, device_t child)
|
|
{
|
|
int rv;
|
|
|
|
rv = bus_print_child_header(dev, child);
|
|
rv += sbus_print_res(device_get_ivars(child));
|
|
rv += bus_print_child_footer(dev, child);
|
|
return (rv);
|
|
}
|
|
|
|
static void
|
|
sbus_probe_nomatch(device_t dev, device_t child)
|
|
{
|
|
const char *type;
|
|
|
|
device_printf(dev, "<%s>", ofw_bus_get_name(child));
|
|
sbus_print_res(device_get_ivars(child));
|
|
type = ofw_bus_get_type(child);
|
|
printf(" type %s (no driver attached)\n",
|
|
type != NULL ? type : "unknown");
|
|
}
|
|
|
|
static int
|
|
sbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
|
|
{
|
|
struct sbus_softc *sc;
|
|
struct sbus_devinfo *dinfo;
|
|
|
|
sc = device_get_softc(dev);
|
|
if ((dinfo = device_get_ivars(child)) == NULL)
|
|
return (ENOENT);
|
|
switch (which) {
|
|
case SBUS_IVAR_BURSTSZ:
|
|
*result = dinfo->sdi_burstsz;
|
|
break;
|
|
case SBUS_IVAR_CLOCKFREQ:
|
|
*result = dinfo->sdi_clockfreq;
|
|
break;
|
|
case SBUS_IVAR_IGN:
|
|
*result = sc->sc_ign;
|
|
break;
|
|
case SBUS_IVAR_SLOT:
|
|
*result = dinfo->sdi_slot;
|
|
break;
|
|
default:
|
|
return (ENOENT);
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
static struct resource_list *
|
|
sbus_get_resource_list(device_t dev, device_t child)
|
|
{
|
|
struct sbus_devinfo *sdi;
|
|
|
|
sdi = device_get_ivars(child);
|
|
return (&sdi->sdi_rl);
|
|
}
|
|
|
|
/* Write to the correct clr register, and call the actual handler. */
|
|
static int
|
|
sbus_intr_stub(void *arg)
|
|
{
|
|
struct sbus_clr *scl;
|
|
|
|
scl = (struct sbus_clr *)arg;
|
|
scl->scl_handler(scl->scl_arg);
|
|
SYSIO_WRITE8(scl->scl_sc, scl->scl_clr, 0);
|
|
return (FILTER_HANDLED);
|
|
}
|
|
|
|
static int
|
|
sbus_setup_intr(device_t dev, device_t child, struct resource *ires, int flags,
|
|
driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep)
|
|
{
|
|
struct sbus_softc *sc;
|
|
struct sbus_clr *scl;
|
|
bus_addr_t intrmapptr, intrclrptr, intrptr;
|
|
u_int64_t intrmap;
|
|
u_int32_t inr, slot;
|
|
int error, i;
|
|
long vec;
|
|
|
|
if (filt != NULL && intr != NULL)
|
|
return (EINVAL);
|
|
sc = device_get_softc(dev);
|
|
scl = (struct sbus_clr *)malloc(sizeof(*scl), M_DEVBUF, M_NOWAIT);
|
|
if (scl == NULL)
|
|
return (ENOMEM);
|
|
intrptr = intrmapptr = intrclrptr = 0;
|
|
intrmap = 0;
|
|
vec = rman_get_start(ires);
|
|
inr = INTVEC(vec);
|
|
if ((inr & INTMAP_OBIO_MASK) == 0) {
|
|
/*
|
|
* We're in an SBus slot, register the map and clear
|
|
* intr registers.
|
|
*/
|
|
slot = INTSLOT(vec);
|
|
intrmapptr = SBR_SLOT0_INT_MAP + slot * 8;
|
|
intrclrptr = SBR_SLOT0_INT_CLR +
|
|
(slot * 8 * 8) + (INTPRI(vec) * 8);
|
|
/* Enable the interrupt, insert IGN. */
|
|
intrmap = inr | (sc->sc_ign << INTMAP_IGN_SHIFT);
|
|
} else {
|
|
intrptr = SBR_SCSI_INT_MAP;
|
|
/* Insert IGN */
|
|
inr |= sc->sc_ign << INTMAP_IGN_SHIFT;
|
|
for (i = 0; intrptr <= SBR_RESERVED_INT_MAP &&
|
|
INTVEC(intrmap = SYSIO_READ8(sc, intrptr)) != inr;
|
|
intrptr += 8, i++)
|
|
;
|
|
if (INTVEC(intrmap) == inr) {
|
|
/* Register the map and clear intr registers */
|
|
intrmapptr = intrptr;
|
|
intrclrptr = SBR_SCSI_INT_CLR + i * 8;
|
|
/* Enable the interrupt */
|
|
} else
|
|
panic("%s: IRQ not found!", __func__);
|
|
}
|
|
|
|
scl->scl_sc = sc;
|
|
scl->scl_arg = arg;
|
|
scl->scl_handler = (filt != NULL) ? filt : (driver_filter_t *)intr;
|
|
scl->scl_clr = intrclrptr;
|
|
/* Disable the interrupt while we fiddle with it */
|
|
SYSIO_WRITE8(sc, intrmapptr, intrmap & ~INTMAP_V);
|
|
if (filt != NULL)
|
|
error = BUS_SETUP_INTR(device_get_parent(dev), child, ires,
|
|
flags, sbus_intr_stub, NULL, scl, cookiep);
|
|
else
|
|
error = BUS_SETUP_INTR(device_get_parent(dev), child, ires,
|
|
flags, NULL, (driver_intr_t *)sbus_intr_stub, scl,
|
|
cookiep);
|
|
if (error != 0) {
|
|
free(scl, M_DEVBUF);
|
|
return (error);
|
|
}
|
|
scl->scl_cookie = *cookiep;
|
|
*cookiep = scl;
|
|
|
|
/*
|
|
* Clear the interrupt, it might have been triggered before it was
|
|
* set up.
|
|
*/
|
|
SYSIO_WRITE8(sc, intrclrptr, 0);
|
|
/*
|
|
* Enable the interrupt and program the target module now we have the
|
|
* handler installed.
|
|
*/
|
|
SYSIO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(intrmap, PCPU_GET(mid)));
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
sbus_teardown_intr(device_t dev, device_t child, struct resource *vec,
|
|
void *cookie)
|
|
{
|
|
struct sbus_clr *scl;
|
|
int error;
|
|
|
|
scl = (struct sbus_clr *)cookie;
|
|
error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec,
|
|
scl->scl_cookie);
|
|
/*
|
|
* Don't disable the interrupt for now, so that stray interrupts get
|
|
* detected...
|
|
*/
|
|
if (error != 0)
|
|
free(scl, M_DEVBUF);
|
|
return (error);
|
|
}
|
|
|
|
static struct resource *
|
|
sbus_alloc_resource(device_t bus, device_t child, int type, int *rid,
|
|
u_long start, u_long end, u_long count, u_int flags)
|
|
{
|
|
struct sbus_softc *sc;
|
|
struct rman *rm;
|
|
struct resource *rv;
|
|
struct resource_list *rl;
|
|
struct resource_list_entry *rle;
|
|
device_t schild;
|
|
bus_space_handle_t bh;
|
|
bus_addr_t toffs;
|
|
bus_size_t tend;
|
|
int i, slot;
|
|
int isdefault, needactivate, passthrough;
|
|
|
|
isdefault = (start == 0UL && end == ~0UL);
|
|
needactivate = flags & RF_ACTIVE;
|
|
passthrough = (device_get_parent(child) != bus);
|
|
rle = NULL;
|
|
sc = device_get_softc(bus);
|
|
rl = BUS_GET_RESOURCE_LIST(bus, child);
|
|
switch (type) {
|
|
case SYS_RES_IRQ:
|
|
return (resource_list_alloc(rl, bus, child, type, rid, start,
|
|
end, count, flags));
|
|
case SYS_RES_MEMORY:
|
|
if (!passthrough) {
|
|
rle = resource_list_find(rl, type, *rid);
|
|
if (rle == NULL)
|
|
return (NULL);
|
|
if (rle->res != NULL)
|
|
panic("%s: resource entry is busy", __func__);
|
|
if (isdefault) {
|
|
start = rle->start;
|
|
count = ulmax(count, rle->count);
|
|
end = ulmax(rle->end, start + count - 1);
|
|
}
|
|
}
|
|
rm = NULL;
|
|
bh = toffs = tend = 0;
|
|
schild = child;
|
|
while (device_get_parent(schild) != bus)
|
|
schild = device_get_parent(child);
|
|
slot = sbus_get_slot(schild);
|
|
for (i = 0; i < sc->sc_nrange; i++) {
|
|
if (sc->sc_rd[i].rd_slot != slot ||
|
|
start < sc->sc_rd[i].rd_coffset ||
|
|
start > sc->sc_rd[i].rd_cend)
|
|
continue;
|
|
/* Disallow cross-range allocations. */
|
|
if (end > sc->sc_rd[i].rd_cend)
|
|
return (NULL);
|
|
/* We've found the connection to the parent bus */
|
|
toffs = start - sc->sc_rd[i].rd_coffset;
|
|
tend = end - sc->sc_rd[i].rd_coffset;
|
|
rm = &sc->sc_rd[i].rd_rman;
|
|
bh = sc->sc_rd[i].rd_bushandle;
|
|
break;
|
|
}
|
|
if (rm == NULL)
|
|
return (NULL);
|
|
flags &= ~RF_ACTIVE;
|
|
rv = rman_reserve_resource(rm, toffs, tend, count, flags,
|
|
child);
|
|
if (rv == NULL)
|
|
return (NULL);
|
|
rman_set_rid(rv, *rid);
|
|
rman_set_bustag(rv, sc->sc_cbustag);
|
|
rman_set_bushandle(rv, bh + rman_get_start(rv));
|
|
if (needactivate) {
|
|
if (bus_activate_resource(child, type, *rid, rv)) {
|
|
rman_release_resource(rv);
|
|
return (NULL);
|
|
}
|
|
}
|
|
if (!passthrough)
|
|
rle->res = rv;
|
|
return (rv);
|
|
default:
|
|
return (NULL);
|
|
}
|
|
}
|
|
|
|
static int
|
|
sbus_activate_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
void *p;
|
|
int error;
|
|
|
|
if (type == SYS_RES_IRQ) {
|
|
return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus),
|
|
child, type, rid, r));
|
|
}
|
|
if (type == SYS_RES_MEMORY) {
|
|
/*
|
|
* Need to memory-map the device space, as some drivers depend
|
|
* on the virtual address being set and useable.
|
|
*/
|
|
error = sparc64_bus_mem_map(rman_get_bustag(r),
|
|
rman_get_bushandle(r), rman_get_size(r), 0, 0, &p);
|
|
if (error != 0)
|
|
return (error);
|
|
rman_set_virtual(r, p);
|
|
}
|
|
return (rman_activate_resource(r));
|
|
}
|
|
|
|
static int
|
|
sbus_deactivate_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
|
|
if (type == SYS_RES_IRQ) {
|
|
return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus),
|
|
child, type, rid, r));
|
|
}
|
|
if (type == SYS_RES_MEMORY) {
|
|
sparc64_bus_mem_unmap(rman_get_virtual(r), rman_get_size(r));
|
|
rman_set_virtual(r, NULL);
|
|
}
|
|
return (rman_deactivate_resource(r));
|
|
}
|
|
|
|
static int
|
|
sbus_release_resource(device_t bus, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
struct resource_list *rl;
|
|
struct resource_list_entry *rle;
|
|
int error, passthrough;
|
|
|
|
passthrough = (device_get_parent(child) != bus);
|
|
rl = BUS_GET_RESOURCE_LIST(bus, child);
|
|
if (type == SYS_RES_IRQ)
|
|
return (resource_list_release(rl, bus, child, type, rid, r));
|
|
if ((rman_get_flags(r) & RF_ACTIVE) != 0) {
|
|
error = bus_deactivate_resource(child, type, rid, r);
|
|
if (error != 0)
|
|
return (error);
|
|
}
|
|
error = rman_release_resource(r);
|
|
if (error != 0 || passthrough)
|
|
return (error);
|
|
rle = resource_list_find(rl, type, rid);
|
|
if (rle == NULL)
|
|
panic("%s: cannot find resource", __func__);
|
|
if (rle->res == NULL)
|
|
panic("%s: resource entry is not busy", __func__);
|
|
rle->res = NULL;
|
|
return (0);
|
|
}
|
|
|
|
static bus_dma_tag_t
|
|
sbus_get_dma_tag(device_t bus, device_t child)
|
|
{
|
|
struct sbus_softc *sc;
|
|
|
|
sc = device_get_softc(bus);
|
|
return (sc->sc_cdmatag);
|
|
}
|
|
|
|
static const struct ofw_bus_devinfo *
|
|
sbus_get_devinfo(device_t bus, device_t child)
|
|
{
|
|
struct sbus_devinfo *sdi;
|
|
|
|
sdi = device_get_ivars(child);
|
|
return (&sdi->sdi_obdinfo);
|
|
}
|
|
|
|
/*
|
|
* Handle an overtemp situation.
|
|
*
|
|
* SPARCs have temperature sensors which generate interrupts
|
|
* if the machine's temperature exceeds a certain threshold.
|
|
* This handles the interrupt and powers off the machine.
|
|
* The same needs to be done to PCI controller drivers.
|
|
*/
|
|
static int
|
|
sbus_overtemp(void *arg)
|
|
{
|
|
|
|
printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n");
|
|
shutdown_nice(RB_POWEROFF);
|
|
return (FILTER_HANDLED);
|
|
}
|
|
|
|
/* Try to shut down in time in case of power failure. */
|
|
static int
|
|
sbus_pwrfail(void *arg)
|
|
{
|
|
|
|
printf("Power failure detected\nShutting down NOW.\n");
|
|
shutdown_nice(0);
|
|
return (FILTER_HANDLED);
|
|
}
|
|
|
|
static bus_space_tag_t
|
|
sbus_alloc_bustag(struct sbus_softc *sc)
|
|
{
|
|
bus_space_tag_t sbt;
|
|
|
|
sbt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF,
|
|
M_NOWAIT | M_ZERO);
|
|
if (sbt == NULL)
|
|
panic("%s: out of memory", __func__);
|
|
|
|
sbt->bst_cookie = sc;
|
|
sbt->bst_parent = sc->sc_bustag;
|
|
sbt->bst_type = SBUS_BUS_SPACE;
|
|
return (sbt);
|
|
}
|
|
|
|
static int
|
|
sbus_print_res(struct sbus_devinfo *sdi)
|
|
{
|
|
int rv;
|
|
|
|
rv = 0;
|
|
rv += resource_list_print_type(&sdi->sdi_rl, "mem", SYS_RES_MEMORY,
|
|
"%#lx");
|
|
rv += resource_list_print_type(&sdi->sdi_rl, "irq", SYS_RES_IRQ,
|
|
"%ld");
|
|
return (rv);
|
|
}
|