grehan 22b3d270f1 Bring to working PIO state.
- use correct rid when allocating PCI mem resource
 - ATA taskfile registers are indeed spaced 0x10 apart just like
 the Macio ATA cell. Adjust offsets in ATA channel struct.

Tested by:  Suleiman Souhlal <ssouhlal@vt.edu>
2004-02-29 06:01:16 +00:00
..
2004-02-29 06:01:16 +00:00
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