3c838a9f51
Support 7xxx adapters including firmware-assisted TSO and VLAN tagging: - Solarflare Flareon Ultra 7000 series 10/40G adapters: - Solarflare SFN7042Q QSFP+ Server Adapter - Solarflare SFN7142Q QSFP+ Server Adapter - Solarflare Flareon Ultra 7000 series 10G adapters: - Solarflare SFN7022F SFP+ Server Adapter - Solarflare SFN7122F SFP+ Server Adapter - Solarflare SFN7322F Precision Time Synchronization Server Adapter - Solarflare Flareon 7000 series 10G adapters: - Solarflare SFN7002F SFP+ Server Adapter Support utilities to configure adapters and update firmware. The work is done by Solarflare developers (Andy Moreton, Andrew Lee and many others), Artem V. Andreev <Artem.Andreev at oktetlabs.ru> and me. Sponsored by: Solarflare Communications, Inc. MFC after: 2 weeks Causually read by: gnn Differential Revision: https://reviews.freebsd.org/D2618
260 lines
6.0 KiB
C
260 lines
6.0 KiB
C
/*-
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* Copyright (c) 2009-2015 Solarflare Communications Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation are
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* those of the authors and should not be interpreted as representing official
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* policies, either expressed or implied, of the FreeBSD Project.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "efsys.h"
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#include "efx.h"
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#include "efx_types.h"
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#include "efx_impl.h"
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__checkReturn int
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efx_port_init(
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__in efx_nic_t *enp)
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{
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efx_port_t *epp = &(enp->en_port);
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efx_phy_ops_t *epop = epp->ep_epop;
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int rc;
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EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
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EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
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EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
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if (enp->en_mod_flags & EFX_MOD_PORT) {
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rc = EINVAL;
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goto fail1;
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}
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enp->en_mod_flags |= EFX_MOD_PORT;
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epp->ep_mac_type = EFX_MAC_INVALID;
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epp->ep_link_mode = EFX_LINK_UNKNOWN;
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epp->ep_mac_poll_needed = B_TRUE;
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epp->ep_mac_drain = B_TRUE;
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/* Configure the MAC */
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if ((rc = efx_mac_select(enp)) != 0)
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goto fail1;
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epp->ep_emop->emo_reconfigure(enp);
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/* Pick up current phy capababilities */
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efx_port_poll(enp, NULL);
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/*
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* Turn on the PHY if available, otherwise reset it, and
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* reconfigure it with the current configuration.
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*/
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if (epop->epo_power != NULL) {
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if ((rc = epop->epo_power(enp, B_TRUE)) != 0)
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goto fail2;
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} else {
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if ((rc = epop->epo_reset(enp)) != 0)
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goto fail2;
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}
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EFSYS_ASSERT(enp->en_reset_flags & EFX_RESET_PHY);
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enp->en_reset_flags &= ~EFX_RESET_PHY;
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if ((rc = epop->epo_reconfigure(enp)) != 0)
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goto fail3;
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return (0);
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fail3:
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EFSYS_PROBE(fail3);
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fail2:
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EFSYS_PROBE(fail2);
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fail1:
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EFSYS_PROBE1(fail1, int, rc);
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enp->en_mod_flags &= ~EFX_MOD_PORT;
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return (rc);
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}
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__checkReturn int
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efx_port_poll(
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__in efx_nic_t *enp,
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__out_opt efx_link_mode_t *link_modep)
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{
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efx_port_t *epp = &(enp->en_port);
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efx_mac_ops_t *emop = epp->ep_emop;
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efx_link_mode_t ignore_link_mode;
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int rc;
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EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
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EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
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EFSYS_ASSERT(emop != NULL);
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EFSYS_ASSERT(!epp->ep_mac_stats_pending);
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if (link_modep == NULL)
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link_modep = &ignore_link_mode;
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if ((rc = emop->emo_poll(enp, link_modep)) != 0)
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goto fail1;
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return (0);
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fail1:
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EFSYS_PROBE1(fail1, int, rc);
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return (rc);
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}
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#if EFSYS_OPT_LOOPBACK
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__checkReturn int
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efx_port_loopback_set(
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__in efx_nic_t *enp,
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__in efx_link_mode_t link_mode,
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__in efx_loopback_type_t loopback_type)
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{
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efx_port_t *epp = &(enp->en_port);
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efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
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efx_mac_ops_t *emop = epp->ep_emop;
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int rc;
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EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
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EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
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EFSYS_ASSERT(emop != NULL);
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EFSYS_ASSERT(link_mode < EFX_LINK_NMODES);
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if (EFX_TEST_QWORD_BIT(encp->enc_loopback_types[link_mode],
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loopback_type) == 0) {
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rc = ENOTSUP;
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goto fail1;
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}
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if (epp->ep_loopback_type == loopback_type &&
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epp->ep_loopback_link_mode == link_mode)
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return (0);
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if ((rc = emop->emo_loopback_set(enp, link_mode, loopback_type)) != 0)
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goto fail2;
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return (0);
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fail2:
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EFSYS_PROBE(fail2);
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fail1:
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EFSYS_PROBE1(fail1, int, rc);
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return (rc);
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}
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#if EFSYS_OPT_NAMES
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static const char *__efx_loopback_type_name[] = {
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"OFF",
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"DATA",
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"GMAC",
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"XGMII",
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"XGXS",
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"XAUI",
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"GMII",
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"SGMII",
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"XGBR",
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"XFI",
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"XAUI_FAR",
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"GMII_FAR",
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"SGMII_FAR",
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"XFI_FAR",
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"GPHY",
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"PHY_XS",
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"PCS",
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"PMA_PMD",
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"XPORT",
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"XGMII_WS",
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"XAUI_WS",
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"XAUI_WS_FAR",
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"XAUI_WS_NEAR",
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"GMII_WS",
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"XFI_WS",
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"XFI_WS_FAR",
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"PHYXS_WS",
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"PMA_INT",
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"SD_NEAR",
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"SD_FAR",
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"PMA_INT_WS",
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"SD_FEP2_WS",
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"SD_FEP1_5_WS",
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"SD_FEP_WS",
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"SD_FES_WS",
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};
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__checkReturn const char *
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efx_loopback_type_name(
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__in efx_nic_t *enp,
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__in efx_loopback_type_t type)
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{
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EFX_STATIC_ASSERT(EFX_ARRAY_SIZE(__efx_loopback_type_name) ==
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EFX_LOOPBACK_NTYPES);
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_NOTE(ARGUNUSED(enp))
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EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
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EFSYS_ASSERT3U(type, <, EFX_LOOPBACK_NTYPES);
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return (__efx_loopback_type_name[type]);
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}
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#endif /* EFSYS_OPT_NAMES */
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#endif /* EFSYS_OPT_LOOPBACK */
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void
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efx_port_fini(
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__in efx_nic_t *enp)
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{
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efx_port_t *epp = &(enp->en_port);
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efx_phy_ops_t *epop = epp->ep_epop;
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EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
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EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
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EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
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EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
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EFSYS_ASSERT(epp->ep_mac_drain);
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epp->ep_emop = NULL;
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epp->ep_mac_type = EFX_MAC_INVALID;
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epp->ep_mac_drain = B_FALSE;
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epp->ep_mac_poll_needed = B_FALSE;
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/* Turn off the PHY */
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if (epop->epo_power != NULL)
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(void) epop->epo_power(enp, B_FALSE);
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enp->en_mod_flags &= ~EFX_MOD_PORT;
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}
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