freebsd-skq/sys/powerpc/aim
Justin Hibbits 4420fc895f powerpc/moea: Fix moea64 native VA invalidation
Summary:
moea64_insert_pteg_native()'s invalidation only works by happenstance.
The purpose of the shifts and XORs is to extract the VSID in order to
reverse-engineer the lower bits of the VPN.  Currently a segment size is 256MB
(2**28), and ADDR_API_SHFT64 is 16, so ADDR_PIDX_SHIFT is equivalent.  However,
it's semantically incorrect, in that we don't want to shift by the page shift
size, we want to shift to get to the VSID.

Tested by:	bdragon
Differential Revision: https://reviews.freebsd.org/D20467
2019-06-01 01:40:14 +00:00
..
aim_machdep.c powerpc: Add POWER8NVL definition 2019-04-27 02:33:49 +00:00
locore32.S powerpc64: Add a trap stack area 2019-02-04 16:02:03 +00:00
locore64.S powerpc64: Add a trap stack area 2019-02-04 16:02:03 +00:00
locore.S
mmu_oea64.c powerpc: Fix moea64 pmap from 347952 2019-05-18 14:55:59 +00:00
mmu_oea64.h Final fix for alignment issues with the page table first patched with 2018-05-14 04:00:52 +00:00
mmu_oea.c vm_wait() rework. 2018-02-20 10:13:13 +00:00
moea64_if.m
moea64_native.c powerpc/moea: Fix moea64 native VA invalidation 2019-06-01 01:40:14 +00:00
mp_cpudep.c powerpc: Initialize the Hardware Interrupt Offset Register (HIOR) earlier for ppc970 2019-05-10 19:36:14 +00:00
slb.c Move the powerpc64 direct map base address from zero to high memory. This 2018-03-07 17:08:07 +00:00
trap_subr32.S powerpc: Add a couple missing isyncs 2019-04-24 02:51:58 +00:00
trap_subr64.S Fix PPC64 kernel build with clang8 + lld8 2019-05-22 15:56:41 +00:00