45d426a34e
mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.
80 lines
2.8 KiB
C
80 lines
2.8 KiB
C
/*-
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* Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org>
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* Copyright (c) Peter Wemm <peter@netplex.com.au>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: src/sys/alpha/include/pcpu.h,v 1.15 2004/11/05 19:16:44 jhb
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* $FreeBSD$
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*/
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#ifndef _MACHINE_PCPU_H_
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#define _MACHINE_PCPU_H_
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#ifdef _KERNEL
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#include <machine/pte.h>
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#define PCPU_MD_FIELDS \
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pd_entry_t *pc_segbase; /* curthread segbase */ \
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struct pmap *pc_curpmap; /* pmap of curthread */ \
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u_int32_t pc_next_asid; /* next ASID to alloc */ \
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u_int32_t pc_asid_generation; /* current ASID generation */ \
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u_int pc_pending_ipis; /* the IPIs pending to this CPU */ \
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void *pc_boot_stack;
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#ifdef SMP
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static __inline struct pcpu*
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get_pcpup(void)
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{
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/*
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* FREEBSD_DEVELOPERS_FIXME
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* In multiprocessor case, store/retrieve the pcpu structure
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* address for current CPU in scratch register for fast access.
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*
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* In this routine, read the scratch register to retrieve the PCPU
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* structure for this CPU
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*/
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struct pcpu *ret;
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/* ret should contain the pointer to the PCPU structure for this CPU */
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return(ret);
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}
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#define PCPUP ((struct pcpu *)get_pcpup())
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#else
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/* Uni processor systems */
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extern struct pcpu *pcpup;
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#define PCPUP pcpup
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#endif /* SMP */
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#define PCPU_ADD(member, value) (PCPUP->pc_ ## member += (value))
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#define PCPU_GET(member) (PCPUP->pc_ ## member)
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#define PCPU_INC(member) PCPU_ADD(member, 1)
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#define PCPU_PTR(member) (&PCPUP->pc_ ## member)
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#define PCPU_SET(member,value) (PCPUP->pc_ ## member = (value))
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#define PCPU_LAZY_INC(member) (++PCPUP->pc_ ## member)
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#endif /* _KERNEL */
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#endif /* !_MACHINE_PCPU_H_ */
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