207 lines
4.7 KiB
C
207 lines
4.7 KiB
C
/*
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* Copyright (c) 2010
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* Ben Gray <ben.r.gray@gmail.com>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Ben Gray.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Texas Instruments - OMAP3xxx series processors
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*
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* Reference:
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* OMAP35x Applications Processor
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* Technical Reference Manual
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* (omap35xx_techref.pdf)
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*/
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#ifndef _TI_PRCM_H_
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#define _TI_PRCM_H_
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typedef enum {
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/* System clocks, typically you can only call ti_prcm_clk_get_source_freq()
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* on these clocks as they are enabled by default.
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*/
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SYS_CLK = 1,
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/* The MPU (ARM) core clock */
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MPU_CLK = 20,
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/* MMC modules */
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MMC0_CLK = 100,
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MMC1_CLK,
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MMC2_CLK,
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MMC3_CLK,
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MMC4_CLK,
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MMC5_CLK,
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/* I2C modules */
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I2C0_CLK = 200,
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I2C1_CLK,
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I2C2_CLK,
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I2C3_CLK,
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I2C4_CLK,
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/* USB module(s) */
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USBTLL_CLK = 300,
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USBHSHOST_CLK,
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USBFSHOST_CLK,
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USBP1_PHY_CLK,
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USBP2_PHY_CLK,
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USBP1_UTMI_CLK,
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USBP2_UTMI_CLK,
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USBP1_HSIC_CLK,
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USBP2_HSIC_CLK,
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/* UART modules */
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UART0_CLK = 400,
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UART1_CLK,
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UART2_CLK,
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UART3_CLK,
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UART4_CLK,
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UART5_CLK,
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UART6_CLK,
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UART7_CLK,
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UART8_CLK,
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/* General purpose timer modules */
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GPTIMER1_CLK = 500,
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GPTIMER2_CLK,
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GPTIMER3_CLK,
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GPTIMER4_CLK,
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GPTIMER5_CLK,
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GPTIMER6_CLK,
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GPTIMER7_CLK,
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GPTIMER8_CLK,
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GPTIMER9_CLK,
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GPTIMER10_CLK,
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GPTIMER11_CLK,
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GPTIMER12_CLK,
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/* McBSP module(s) */
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MCBSP1_CLK = 600,
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MCBSP2_CLK,
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MCBSP3_CLK,
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MCBSP4_CLK,
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MCBSP5_CLK,
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/* General purpose I/O modules */
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GPIO0_CLK = 700,
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GPIO1_CLK,
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GPIO2_CLK,
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GPIO3_CLK,
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GPIO4_CLK,
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GPIO5_CLK,
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GPIO6_CLK,
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/* sDMA module */
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SDMA_CLK = 800,
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/* DMTimer modules */
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DMTIMER0_CLK = 900,
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DMTIMER1_CLK,
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DMTIMER2_CLK,
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DMTIMER3_CLK,
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DMTIMER4_CLK,
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DMTIMER5_CLK,
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DMTIMER6_CLK,
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DMTIMER7_CLK,
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/* CPSW modules */
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CPSW_CLK = 1000,
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/* Mentor USB modules */
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MUSB0_CLK = 1100,
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/* EDMA module */
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EDMA_TPCC_CLK = 1200,
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EDMA_TPTC0_CLK,
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EDMA_TPTC1_CLK,
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EDMA_TPTC2_CLK,
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/* LCD controller module */
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LCDC_CLK = 1300,
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/* PWM modules */
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PWMSS0_CLK = 1400,
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PWMSS1_CLK,
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PWMSS2_CLK,
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/* Mailbox modules */
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MAILBOX0_CLK = 1500,
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/* Spinlock modules */
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SPINLOCK0_CLK = 1600,
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PRUSS_CLK = 1700,
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INVALID_CLK_IDENT
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} clk_ident_t;
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/*
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*
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*/
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typedef enum {
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SYSCLK_CLK, /* System clock */
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EXT_CLK,
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F32KHZ_CLK, /* 32KHz clock */
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F48MHZ_CLK, /* 48MHz clock */
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F64MHZ_CLK, /* 64MHz clock */
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F96MHZ_CLK, /* 96MHz clock */
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} clk_src_t;
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struct ti_clock_dev {
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/* The profile of the timer */
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clk_ident_t id;
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/* A bunch of callbacks associated with the clock device */
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int (*clk_activate)(struct ti_clock_dev *clkdev);
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int (*clk_deactivate)(struct ti_clock_dev *clkdev);
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int (*clk_set_source)(struct ti_clock_dev *clkdev,
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clk_src_t clksrc);
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int (*clk_accessible)(struct ti_clock_dev *clkdev);
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int (*clk_get_source_freq)(struct ti_clock_dev *clkdev,
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unsigned int *freq);
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};
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int ti_prcm_clk_valid(clk_ident_t clk);
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int ti_prcm_clk_enable(clk_ident_t clk);
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int ti_prcm_clk_disable(clk_ident_t clk);
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int ti_prcm_clk_accessible(clk_ident_t clk);
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int ti_prcm_clk_disable_autoidle(clk_ident_t clk);
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int ti_prcm_clk_set_source(clk_ident_t clk, clk_src_t clksrc);
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int ti_prcm_clk_get_source_freq(clk_ident_t clk, unsigned int *freq);
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void ti_prcm_reset(void);
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#endif /* _TI_PRCM_H_ */
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