f785676f2a
all of the features in the current working draft of the upcoming C++ standard, provisionally named C++1y. The code generator's performance is greatly increased, and the loop auto-vectorizer is now enabled at -Os and -O2 in addition to -O3. The PowerPC backend has made several major improvements to code generation quality and compile time, and the X86, SPARC, ARM32, Aarch64 and SystemZ backends have all seen major feature work. Release notes for llvm and clang can be found here: <http://llvm.org/releases/3.4/docs/ReleaseNotes.html> <http://llvm.org/releases/3.4/tools/clang/docs/ReleaseNotes.html> MFC after: 1 month
325 lines
11 KiB
C++
325 lines
11 KiB
C++
//===-- MipsELFObjectWriter.cpp - Mips ELF Writer -------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/MipsBaseInfo.h"
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#include "MCTargetDesc/MipsFixupKinds.h"
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#include "MCTargetDesc/MipsMCTargetDesc.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCSection.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/ErrorHandling.h"
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#include <list>
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using namespace llvm;
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namespace {
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struct RelEntry {
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RelEntry(const ELFRelocationEntry &R, const MCSymbol *S, int64_t O) :
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Reloc(R), Sym(S), Offset(O) {}
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ELFRelocationEntry Reloc;
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const MCSymbol *Sym;
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int64_t Offset;
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};
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typedef std::list<RelEntry> RelLs;
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typedef RelLs::iterator RelLsIter;
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class MipsELFObjectWriter : public MCELFObjectTargetWriter {
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public:
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MipsELFObjectWriter(bool _is64Bit, uint8_t OSABI,
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bool _isN64, bool IsLittleEndian);
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virtual ~MipsELFObjectWriter();
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virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
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bool IsPCRel, bool IsRelocWithSymbol,
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int64_t Addend) const;
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virtual const MCSymbol *ExplicitRelSym(const MCAssembler &Asm,
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const MCValue &Target,
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const MCFragment &F,
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const MCFixup &Fixup,
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bool IsPCRel) const;
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virtual void sortRelocs(const MCAssembler &Asm,
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std::vector<ELFRelocationEntry> &Relocs);
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};
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}
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MipsELFObjectWriter::MipsELFObjectWriter(bool _is64Bit, uint8_t OSABI,
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bool _isN64, bool IsLittleEndian)
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: MCELFObjectTargetWriter(_is64Bit, OSABI, ELF::EM_MIPS,
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/*HasRelocationAddend*/ (_isN64) ? true : false,
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/*IsN64*/ _isN64) {}
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MipsELFObjectWriter::~MipsELFObjectWriter() {}
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const MCSymbol *MipsELFObjectWriter::ExplicitRelSym(const MCAssembler &Asm,
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const MCValue &Target,
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const MCFragment &F,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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assert(Target.getSymA() && "SymA cannot be 0.");
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const MCSymbol &Sym = Target.getSymA()->getSymbol().AliasedSymbol();
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if (Sym.getSection().getKind().isMergeableCString() ||
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Sym.getSection().getKind().isMergeableConst())
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return &Sym;
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return NULL;
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}
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unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel,
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bool IsRelocWithSymbol,
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int64_t Addend) const {
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// determine the type of the relocation
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unsigned Type = (unsigned)ELF::R_MIPS_NONE;
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unsigned Kind = (unsigned)Fixup.getKind();
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switch (Kind) {
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default:
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llvm_unreachable("invalid fixup kind!");
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case FK_Data_4:
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Type = ELF::R_MIPS_32;
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break;
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case FK_Data_8:
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Type = ELF::R_MIPS_64;
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break;
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case FK_GPRel_4:
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if (isN64()) {
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Type = setRType((unsigned)ELF::R_MIPS_GPREL32, Type);
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Type = setRType2((unsigned)ELF::R_MIPS_64, Type);
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Type = setRType3((unsigned)ELF::R_MIPS_NONE, Type);
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}
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else
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Type = ELF::R_MIPS_GPREL32;
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break;
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case Mips::fixup_Mips_GPREL16:
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Type = ELF::R_MIPS_GPREL16;
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break;
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case Mips::fixup_Mips_26:
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Type = ELF::R_MIPS_26;
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break;
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case Mips::fixup_Mips_CALL16:
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Type = ELF::R_MIPS_CALL16;
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break;
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case Mips::fixup_Mips_GOT_Global:
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case Mips::fixup_Mips_GOT_Local:
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Type = ELF::R_MIPS_GOT16;
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break;
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case Mips::fixup_Mips_HI16:
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Type = ELF::R_MIPS_HI16;
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break;
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case Mips::fixup_Mips_LO16:
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Type = ELF::R_MIPS_LO16;
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break;
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case Mips::fixup_Mips_TLSGD:
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Type = ELF::R_MIPS_TLS_GD;
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break;
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case Mips::fixup_Mips_GOTTPREL:
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Type = ELF::R_MIPS_TLS_GOTTPREL;
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break;
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case Mips::fixup_Mips_TPREL_HI:
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Type = ELF::R_MIPS_TLS_TPREL_HI16;
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break;
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case Mips::fixup_Mips_TPREL_LO:
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Type = ELF::R_MIPS_TLS_TPREL_LO16;
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break;
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case Mips::fixup_Mips_TLSLDM:
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Type = ELF::R_MIPS_TLS_LDM;
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break;
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case Mips::fixup_Mips_DTPREL_HI:
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Type = ELF::R_MIPS_TLS_DTPREL_HI16;
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break;
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case Mips::fixup_Mips_DTPREL_LO:
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Type = ELF::R_MIPS_TLS_DTPREL_LO16;
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break;
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case Mips::fixup_Mips_Branch_PCRel:
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case Mips::fixup_Mips_PC16:
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Type = ELF::R_MIPS_PC16;
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break;
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case Mips::fixup_Mips_GOT_PAGE:
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Type = ELF::R_MIPS_GOT_PAGE;
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break;
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case Mips::fixup_Mips_GOT_OFST:
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Type = ELF::R_MIPS_GOT_OFST;
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break;
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case Mips::fixup_Mips_GOT_DISP:
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Type = ELF::R_MIPS_GOT_DISP;
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break;
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case Mips::fixup_Mips_GPOFF_HI:
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Type = setRType((unsigned)ELF::R_MIPS_GPREL16, Type);
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Type = setRType2((unsigned)ELF::R_MIPS_SUB, Type);
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Type = setRType3((unsigned)ELF::R_MIPS_HI16, Type);
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break;
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case Mips::fixup_Mips_GPOFF_LO:
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Type = setRType((unsigned)ELF::R_MIPS_GPREL16, Type);
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Type = setRType2((unsigned)ELF::R_MIPS_SUB, Type);
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Type = setRType3((unsigned)ELF::R_MIPS_LO16, Type);
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break;
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case Mips::fixup_Mips_HIGHER:
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Type = ELF::R_MIPS_HIGHER;
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break;
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case Mips::fixup_Mips_HIGHEST:
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Type = ELF::R_MIPS_HIGHEST;
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break;
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case Mips::fixup_Mips_GOT_HI16:
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Type = ELF::R_MIPS_GOT_HI16;
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break;
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case Mips::fixup_Mips_GOT_LO16:
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Type = ELF::R_MIPS_GOT_LO16;
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break;
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case Mips::fixup_Mips_CALL_HI16:
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Type = ELF::R_MIPS_CALL_HI16;
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break;
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case Mips::fixup_Mips_CALL_LO16:
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Type = ELF::R_MIPS_CALL_LO16;
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break;
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case Mips::fixup_MICROMIPS_26_S1:
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Type = ELF::R_MICROMIPS_26_S1;
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break;
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case Mips::fixup_MICROMIPS_HI16:
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Type = ELF::R_MICROMIPS_HI16;
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break;
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case Mips::fixup_MICROMIPS_LO16:
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Type = ELF::R_MICROMIPS_LO16;
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break;
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case Mips::fixup_MICROMIPS_GOT16:
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Type = ELF::R_MICROMIPS_GOT16;
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break;
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case Mips::fixup_MICROMIPS_PC16_S1:
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Type = ELF::R_MICROMIPS_PC16_S1;
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break;
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case Mips::fixup_MICROMIPS_CALL16:
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Type = ELF::R_MICROMIPS_CALL16;
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break;
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case Mips::fixup_MICROMIPS_GOT_DISP:
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Type = ELF::R_MICROMIPS_GOT_DISP;
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break;
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case Mips::fixup_MICROMIPS_GOT_PAGE:
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Type = ELF::R_MICROMIPS_GOT_PAGE;
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break;
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case Mips::fixup_MICROMIPS_GOT_OFST:
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Type = ELF::R_MICROMIPS_GOT_OFST;
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break;
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case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16:
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Type = ELF::R_MICROMIPS_TLS_DTPREL_HI16;
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break;
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case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16:
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Type = ELF::R_MICROMIPS_TLS_DTPREL_LO16;
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break;
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case Mips::fixup_MICROMIPS_TLS_TPREL_HI16:
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Type = ELF::R_MICROMIPS_TLS_TPREL_HI16;
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break;
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case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
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Type = ELF::R_MICROMIPS_TLS_TPREL_LO16;
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break;
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}
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return Type;
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}
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// Return true if R is either a GOT16 against a local symbol or HI16.
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static bool NeedsMatchingLo(const MCAssembler &Asm, const RelEntry &R) {
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if (!R.Sym)
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return false;
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MCSymbolData &SD = Asm.getSymbolData(R.Sym->AliasedSymbol());
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return ((R.Reloc.Type == ELF::R_MIPS_GOT16) && !SD.isExternal()) ||
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(R.Reloc.Type == ELF::R_MIPS_HI16);
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}
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static bool HasMatchingLo(const MCAssembler &Asm, RelLsIter I, RelLsIter Last) {
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if (I == Last)
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return false;
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RelLsIter Hi = I++;
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return (I->Reloc.Type == ELF::R_MIPS_LO16) && (Hi->Sym == I->Sym) &&
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(Hi->Offset == I->Offset);
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}
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static bool HasSameSymbol(const RelEntry &R0, const RelEntry &R1) {
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return R0.Sym == R1.Sym;
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}
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static int CompareOffset(const RelEntry &R0, const RelEntry &R1) {
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return (R0.Offset > R1.Offset) ? 1 : ((R0.Offset == R1.Offset) ? 0 : -1);
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}
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void MipsELFObjectWriter::sortRelocs(const MCAssembler &Asm,
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std::vector<ELFRelocationEntry> &Relocs) {
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// Call the default function first. Relocations are sorted in descending
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// order of r_offset.
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MCELFObjectTargetWriter::sortRelocs(Asm, Relocs);
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RelLs RelocLs;
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std::vector<RelLsIter> Unmatched;
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// Fill RelocLs. Traverse Relocs backwards so that relocations in RelocLs
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// are in ascending order of r_offset.
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for (std::vector<ELFRelocationEntry>::reverse_iterator R = Relocs.rbegin();
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R != Relocs.rend(); ++R) {
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std::pair<const MCSymbolRefExpr*, int64_t> P =
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MipsGetSymAndOffset(*R->Fixup);
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RelocLs.push_back(RelEntry(*R, P.first ? &P.first->getSymbol() : 0,
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P.second));
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}
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// Get list of unmatched HI16 and GOT16.
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for (RelLsIter R = RelocLs.begin(); R != RelocLs.end(); ++R)
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if (NeedsMatchingLo(Asm, *R) && !HasMatchingLo(Asm, R, --RelocLs.end()))
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Unmatched.push_back(R);
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// Insert unmatched HI16 and GOT16 immediately before their matching LO16.
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for (std::vector<RelLsIter>::iterator U = Unmatched.begin();
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U != Unmatched.end(); ++U) {
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RelLsIter LoPos = RelocLs.end(), HiPos = *U;
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bool MatchedLo = false;
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for (RelLsIter R = RelocLs.begin(); R != RelocLs.end(); ++R) {
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if ((R->Reloc.Type == ELF::R_MIPS_LO16) && HasSameSymbol(*HiPos, *R) &&
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(CompareOffset(*R, *HiPos) >= 0) &&
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((LoPos == RelocLs.end()) || ((CompareOffset(*R, *LoPos) < 0)) ||
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(!MatchedLo && !CompareOffset(*R, *LoPos))))
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LoPos = R;
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MatchedLo = NeedsMatchingLo(Asm, *R) &&
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HasMatchingLo(Asm, R, --RelocLs.end());
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}
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// If a matching LoPos was found, move HiPos and insert it before LoPos.
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// Make the offsets of HiPos and LoPos match.
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if (LoPos != RelocLs.end()) {
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HiPos->Offset = LoPos->Offset;
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RelocLs.insert(LoPos, *HiPos);
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RelocLs.erase(HiPos);
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}
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}
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// Put the sorted list back in reverse order.
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assert(Relocs.size() == RelocLs.size());
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unsigned I = RelocLs.size();
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for (RelLsIter R = RelocLs.begin(); R != RelocLs.end(); ++R)
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Relocs[--I] = R->Reloc;
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}
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MCObjectWriter *llvm::createMipsELFObjectWriter(raw_ostream &OS,
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uint8_t OSABI,
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bool IsLittleEndian,
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bool Is64Bit) {
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MCELFObjectTargetWriter *MOTW = new MipsELFObjectWriter(Is64Bit, OSABI,
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(Is64Bit) ? true : false,
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IsLittleEndian);
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return createELFObjectWriter(MOTW, OS, IsLittleEndian);
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}
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