raj eece70b41c Eliminate flushing of L2 cache in ARM context switch routines. ... With VIPT L2 cache such syncing not only is redundant, but also a performance penalty. Pointed out by: cognet		2008-10-16 19:06:24 +00:00
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arm	Eliminate flushing of L2 cache in ARM context switch routines.	2008-10-16 19:06:24 +00:00
at91	Use bus_get_dma_tag() instead of NULL here. Not really needed for atmel	2008-10-07 17:23:16 +00:00
compile
conf	Add kernel config files for Marvell development boards.	2008-10-14 08:18:27 +00:00
include	Initial support of loader(8) for ARM machines running U-Boot.	2008-10-14 10:11:14 +00:00
mv	Introduce basic support for Marvell families of system-on-chip ARM devices:	2008-10-13 20:07:13 +00:00
sa11x0	Now that all platforms use genclock, shuffle things around slightly	2008-04-22 19:38:30 +00:00
xscale	correct sizeof calculation	2008-10-14 16:27:52 +00:00