8a03f98a8b
- Added bhnd(4) bus APIs for per-core ioctl/iost register access. - Updated reset/suspend bhnd(4) APIs for compatibility with ioctl/iost changes. - Implemented core reset/suspend support for both bcma(4) and siba(4). - Implemented explicit release of all outstanding PMU requests at the bus level when putting a core into reset. Approved by: adrian (mentor, implicit) Differential Revision: https://reviews.freebsd.org/D8009
552 lines
14 KiB
C
552 lines
14 KiB
C
/*-
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* Copyright (c) 2015 Landon Fuller <landon@landonf.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/limits.h>
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#include <sys/systm.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <dev/bhnd/bhndvar.h>
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#include "sibareg.h"
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#include "sibavar.h"
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/**
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* Map a siba(4) OCP vendor code to its corresponding JEDEC JEP-106 vendor
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* code.
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*
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* @param ocp_vendor An OCP vendor code.
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* @return The BHND_MFGID constant corresponding to @p ocp_vendor, or
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* BHND_MFGID_INVALID if the OCP vendor is unknown.
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*/
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uint16_t
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siba_get_bhnd_mfgid(uint16_t ocp_vendor)
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{
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switch (ocp_vendor) {
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case OCP_VENDOR_BCM:
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return (BHND_MFGID_BCM);
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default:
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return (BHND_MFGID_INVALID);
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}
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}
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/**
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* Parse the SIBA_IDH_* fields from the per-core identification
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* registers, returning a siba_core_id representation.
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*
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* @param idhigh The SIBA_R0_IDHIGH register.
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* @param idlow The SIBA_R0_IDLOW register.
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* @param core_id The core id (index) to include in the result.
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* @param unit The unit number to include in the result.
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*/
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struct siba_core_id
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siba_parse_core_id(uint32_t idhigh, uint32_t idlow, u_int core_idx, int unit)
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{
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uint16_t ocp_vendor;
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uint8_t sonics_rev;
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uint8_t num_addrspace;
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uint8_t num_cfg;
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ocp_vendor = SIBA_REG_GET(idhigh, IDH_VENDOR);
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sonics_rev = SIBA_REG_GET(idlow, IDL_SBREV);
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num_addrspace = SIBA_REG_GET(idlow, IDL_NRADDR) + 1 /* + enum block */;
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/* Determine the number of sonics config register blocks */
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num_cfg = SIBA_CFG_NUM_2_2;
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if (sonics_rev >= SIBA_IDL_SBREV_2_3)
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num_cfg = SIBA_CFG_NUM_2_3;
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return (struct siba_core_id) {
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.core_info = {
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.vendor = siba_get_bhnd_mfgid(ocp_vendor),
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.device = SIBA_REG_GET(idhigh, IDH_DEVICE),
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.hwrev = SIBA_IDH_CORE_REV(idhigh),
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.core_idx = core_idx,
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.unit = unit
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},
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.sonics_vendor = ocp_vendor,
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.sonics_rev = sonics_rev,
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.num_addrspace = num_addrspace,
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.num_cfg_blocks = num_cfg
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};
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}
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/**
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* Allocate and return a new empty device info structure.
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*
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* @param bus The requesting bus device.
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*
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* @retval NULL if allocation failed.
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*/
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struct siba_devinfo *
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siba_alloc_dinfo(device_t bus)
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{
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struct siba_devinfo *dinfo;
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dinfo = malloc(sizeof(struct siba_devinfo), M_BHND, M_NOWAIT|M_ZERO);
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if (dinfo == NULL)
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return NULL;
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for (u_int i = 0; i < nitems(dinfo->cfg); i++) {
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dinfo->cfg[i] = NULL;
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dinfo->cfg_rid[i] = -1;
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}
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resource_list_init(&dinfo->resources);
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return dinfo;
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}
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/**
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* Initialize a device info structure previously allocated via
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* siba_alloc_dinfo, copying the provided core id.
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*
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* @param dev The requesting bus device.
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* @param dinfo The device info instance.
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* @param core Device core info.
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*
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* @retval 0 success
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* @retval non-zero initialization failed.
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*/
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int
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siba_init_dinfo(device_t dev, struct siba_devinfo *dinfo,
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const struct siba_core_id *core_id)
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{
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dinfo->core_id = *core_id;
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return (0);
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}
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/**
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* Map an addrspace index to its corresponding bhnd(4) port number.
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*
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* @param addrspace Address space index.
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*/
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u_int
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siba_addrspace_port(u_int addrspace)
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{
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/* The first addrspace is always mapped to device0; the remainder
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* are mapped to device1 */
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if (addrspace == 0)
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return (0);
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else
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return (1);
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}
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/**
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* Map an addrspace index to its corresponding bhnd(4) region number.
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*
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* @param addrspace Address space index.
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*/
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u_int
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siba_addrspace_region(u_int addrspace)
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{
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/* The first addrspace is always mapped to device0.0; the remainder
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* are mapped to device1.0 + (n - 1) */
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if (addrspace == 0)
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return (0);
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else
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return (addrspace - 1);
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}
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/**
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* Return the number of bhnd(4) ports to advertise for the given
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* @p num_addrspace.
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*
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* @param num_addrspace The number of siba address spaces.
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*/
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u_int
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siba_addrspace_port_count(u_int num_addrspace)
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{
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/* 0, 1, or 2 ports */
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return min(num_addrspace, 2);
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}
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/**
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* Return the number of bhnd(4) regions to advertise on @p port
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* given the provided @p num_addrspace address space count.
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*
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* @param num_addrspace The number of core-mapped siba(4) Sonics/OCP address
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* spaces.
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*/
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u_int
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siba_addrspace_region_count(u_int num_addrspace, u_int port)
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{
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/* The first address space, if any, is mapped to device0.0 */
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if (port == 0)
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return (min(num_addrspace, 1));
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/* All remaining address spaces are mapped to device0.(n - 1) */
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if (port == 1 && num_addrspace >= 2)
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return (num_addrspace - 1);
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/* No region mapping */
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return (0);
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}
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/**
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* Return true if @p port is defined given an address space count
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* of @p num_addrspace, false otherwise.
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*
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* Refer to the siba_find_addrspace() function for information on siba's
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* mapping of bhnd(4) port and region identifiers.
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*
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* @param num_addrspace The number of address spaces to verify the port against.
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* @param type The bhnd(4) port type.
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* @param port The bhnd(4) port number.
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*/
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bool
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siba_is_port_valid(u_int num_addrspace, bhnd_port_type type, u_int port)
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{
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/* Only device ports are supported */
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if (type != BHND_PORT_DEVICE)
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return (false);
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/* Verify the index against the port count */
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if (siba_addrspace_port_count(num_addrspace) <= port)
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return (false);
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return (true);
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}
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/**
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* Map a bhnd(4) type/port/region triplet to its associated address space
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* index, if any.
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*
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* For compatibility with bcma(4), we map address spaces to port/region
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* identifiers as follows:
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*
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* [port] [addrspace]
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* device0.0 0
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* device1.0 1
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* device1.1 2
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* device1.2 3
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*
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* The only supported port type is BHND_PORT_DEVICE.
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*
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* @param num_addrspace The number of available siba address spaces.
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* @param type The bhnd(4) port type.
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* @param port The bhnd(4) port number.
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* @param region The bhnd(4) port region.
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* @param addridx On success, the corresponding addrspace index.
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*
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* @retval 0 success
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* @retval ENOENT if the given type/port/region cannot be mapped to a
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* siba address space.
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*/
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int
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siba_addrspace_index(u_int num_addrspace, bhnd_port_type type, u_int port,
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u_int region, u_int *addridx)
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{
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u_int idx;
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if (!siba_is_port_valid(num_addrspace, type, port))
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return (ENOENT);
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if (port == 0)
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idx = region;
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else if (port == 1)
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idx = region + 1;
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else
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return (ENOENT);
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if (idx >= num_addrspace)
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return (ENOENT);
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/* Found */
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*addridx = idx;
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return (0);
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}
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/**
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* Map an bhnd(4) type/port/region triplet to its associated address space
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* entry, if any.
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*
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* The only supported port type is BHND_PORT_DEVICE.
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*
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* @param dinfo The device info to search for a matching address space.
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* @param type The bhnd(4) port type.
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* @param port The bhnd(4) port number.
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* @param region The bhnd(4) port region.
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*/
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struct siba_addrspace *
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siba_find_addrspace(struct siba_devinfo *dinfo, bhnd_port_type type, u_int port,
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u_int region)
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{
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u_int addridx;
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int error;
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/* Map to addrspace index */
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error = siba_addrspace_index(dinfo->core_id.num_addrspace, type, port,
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region, &addridx);
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if (error)
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return (NULL);
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/* Found */
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if (addridx >= SIBA_MAX_ADDRSPACE)
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return (NULL);
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return (&dinfo->addrspace[addridx]);
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}
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/**
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* Append an address space entry to @p dinfo.
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*
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* @param dinfo The device info entry to update.
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* @param addridx The address space index.
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* @param base The mapping's base address.
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* @param size The mapping size.
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* @param bus_reserved Number of bytes to reserve in @p size for bus use
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* when registering the resource list entry. This is used to reserve bus
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* access to the core's SIBA_CFG* register blocks.
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*
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* @retval 0 success
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* @retval non-zero An error occurred appending the entry.
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*/
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int
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siba_append_dinfo_region(struct siba_devinfo *dinfo, uint8_t addridx,
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uint32_t base, uint32_t size, uint32_t bus_reserved)
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{
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struct siba_addrspace *sa;
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rman_res_t r_size;
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/* Verify that base + size will not overflow */
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if (size > 0 && UINT32_MAX - (size - 1) < base)
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return (ERANGE);
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/* Verify that size - bus_reserved will not underflow */
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if (size < bus_reserved)
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return (ERANGE);
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/* Must not be 0-length */
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if (size == 0)
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return (EINVAL);
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/* Must not exceed addrspace array size */
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if (addridx >= nitems(dinfo->addrspace))
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return (EINVAL);
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/* Initialize new addrspace entry */
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sa = &dinfo->addrspace[addridx];
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sa->sa_base = base;
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sa->sa_size = size;
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sa->sa_bus_reserved = bus_reserved;
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/* Populate the resource list */
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r_size = size - bus_reserved;
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sa->sa_rid = resource_list_add_next(&dinfo->resources, SYS_RES_MEMORY,
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base, base + (r_size - 1), r_size);
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return (0);
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}
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/**
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* Deallocate the given device info structure and any associated resources.
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*
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* @param dev The requesting bus device.
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* @param dinfo Device info to be deallocated.
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*/
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void
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siba_free_dinfo(device_t dev, struct siba_devinfo *dinfo)
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{
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resource_list_free(&dinfo->resources);
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/* Free all mapped configuration blocks */
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for (u_int i = 0; i < nitems(dinfo->cfg); i++) {
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if (dinfo->cfg[i] == NULL)
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continue;
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bhnd_release_resource(dev, SYS_RES_MEMORY, dinfo->cfg_rid[i],
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dinfo->cfg[i]);
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dinfo->cfg[i] = NULL;
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dinfo->cfg_rid[i] = -1;
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}
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free(dinfo, M_BHND);
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}
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/**
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* Return the core-enumeration-relative offset for the @p addrspace
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* SIBA_R0_ADMATCH* register.
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*
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* @param addrspace The address space index.
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*
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* @retval non-zero success
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* @retval 0 the given @p addrspace index is not supported.
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*/
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u_int
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siba_admatch_offset(uint8_t addrspace)
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{
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switch (addrspace) {
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case 0:
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return SB0_REG_ABS(SIBA_CFG0_ADMATCH0);
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case 1:
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return SB0_REG_ABS(SIBA_CFG0_ADMATCH1);
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case 2:
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return SB0_REG_ABS(SIBA_CFG0_ADMATCH2);
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case 3:
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return SB0_REG_ABS(SIBA_CFG0_ADMATCH3);
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default:
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return (0);
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}
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}
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/**
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* Parse a SIBA_R0_ADMATCH* register.
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*
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* @param addrspace The address space index.
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* @param am The address match register value to be parsed.
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* @param[out] addr The parsed address.
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* @param[out] size The parsed size.
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*
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* @retval 0 success
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* @retval non-zero a parse error occurred.
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*/
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int
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siba_parse_admatch(uint32_t am, uint32_t *addr, uint32_t *size)
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{
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u_int am_type;
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/* Negative encoding is not supported. This is not used on any
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* currently known devices*/
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if (am & SIBA_AM_ADNEG)
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return (EINVAL);
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/* Extract the base address and size */
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am_type = SIBA_REG_GET(am, AM_TYPE);
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switch (am_type) {
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case 0:
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*addr = am & SIBA_AM_BASE0_MASK;
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*size = 1 << (SIBA_REG_GET(am, AM_ADINT0) + 1);
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break;
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case 1:
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*addr = am & SIBA_AM_BASE1_MASK;
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*size = 1 << (SIBA_REG_GET(am, AM_ADINT1) + 1);
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break;
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case 2:
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*addr = am & SIBA_AM_BASE2_MASK;
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*size = 1 << (SIBA_REG_GET(am, AM_ADINT2) + 1);
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break;
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default:
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return (EINVAL);
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}
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return (0);
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}
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/**
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* Write @p value to @p dev's CFG0 target/initiator state register and
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* wait for completion.
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*
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* @param dev The siba(4) child device.
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* @param reg The state register to write (e.g. SIBA_CFG0_TMSTATELOW,
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* SIBA_CFG0_IMSTATE)
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* @param value The value to write to @p reg.
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* @param mask The mask of bits to be included from @p value.
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*
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* @retval 0 success.
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* @retval ENODEV if SIBA_CFG0 is not mapped by @p dinfo.
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* @retval ETIMEDOUT if a timeout occurs prior to SIBA_TMH_BUSY clearing.
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*/
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int
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siba_write_target_state(device_t dev, struct siba_devinfo *dinfo,
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bus_size_t reg, uint32_t value, uint32_t mask)
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{
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struct bhnd_resource *r;
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uint32_t rval;
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/* Must have a CFG0 block */
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if ((r = dinfo->cfg[0]) == NULL)
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return (ENODEV);
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/* Verify the register offset falls within CFG register block */
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if (reg > SIBA_CFG_SIZE-4)
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return (EFAULT);
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for (int i = 0; i < 300; i += 10) {
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rval = bhnd_bus_read_4(r, reg);
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rval &= ~mask;
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rval |= (value & mask);
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bhnd_bus_write_4(r, reg, rval);
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bhnd_bus_read_4(r, reg); /* read-back */
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DELAY(1);
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/* If the write has completed, wait for target busy state
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* to clear */
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rval = bhnd_bus_read_4(r, reg);
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if ((rval & mask) == (value & mask))
|
|
return (siba_wait_target_busy(dev, dinfo, 100000));
|
|
|
|
DELAY(10);
|
|
}
|
|
|
|
return (ETIMEDOUT);
|
|
}
|
|
|
|
/**
|
|
* Spin for up to @p usec waiting for SIBA_TMH_BUSY to clear in
|
|
* @p dev's SIBA_CFG0_TMSTATEHIGH register.
|
|
*
|
|
* @param dev The siba(4) child device to wait on.
|
|
* @param dinfo The @p dev's device info
|
|
*
|
|
* @retval 0 if SIBA_TMH_BUSY is cleared prior to the @p usec timeout.
|
|
* @retval ENODEV if SIBA_CFG0 is not mapped by @p dinfo.
|
|
* @retval ETIMEDOUT if a timeout occurs prior to SIBA_TMH_BUSY clearing.
|
|
*/
|
|
int
|
|
siba_wait_target_busy(device_t dev, struct siba_devinfo *dinfo, int usec)
|
|
{
|
|
struct bhnd_resource *r;
|
|
uint32_t ts_high;
|
|
|
|
if ((r = dinfo->cfg[0]) == NULL)
|
|
return (ENODEV);
|
|
|
|
for (int i = 0; i < usec; i += 10) {
|
|
ts_high = bhnd_bus_read_4(r, SIBA_CFG0_TMSTATEHIGH);
|
|
if (!(ts_high & SIBA_TMH_BUSY))
|
|
return (0);
|
|
|
|
DELAY(10);
|
|
}
|
|
|
|
device_printf(dev, "SIBA_TMH_BUSY wait timeout\n");
|
|
return (ETIMEDOUT);
|
|
}
|