c203fa6940
This adds and enables the PV console used on XEN kernels to GENERIC/XENHVM kernels in order for it to be used on PVH. Approved by: gibbs Sponsored by: Citrix Systems R&D dev/xen/console/console.c: - Define console_page. - Move xc_printf debug function from i386 XEN code to generic console code. - Rework xc_printf. - Use xen_initial_domain instead of open-coded checks for Dom0. - Gate the attach of the PV console to PV(H) guests. dev/xen/console/xencons_ring.c: - Allow the PV Xen console to output earlier by directly signaling the event channel in start_info if the event channel is not yet initialized. - Use HYPERVISOR_start_info instead of xen_start_info. i386/include/xen/xen-os.h: - Remove prototype for xc_printf since it's now declared in global xen-os.h i386/xen/xen_machdep.c: - Remove previous version of xc_printf. - Remove definition of console_page (now it's defined in the console itself). - Fix some printf formatting errors. x86/xen/pv.c: - Add some early boot debug messages using xc_printf. - Set console_page based on the value passed in start_info. xen/xen-os.h: - Declare console_page and add prototype for xc_printf.
288 lines
9.6 KiB
C
288 lines
9.6 KiB
C
/*****************************************************************************
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* i386/xen/xen-os.h
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*
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* Random collection of macros and definition
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*
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* Copyright (c) 2003, 2004 Keir Fraser (on behalf of the Xen team)
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* All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_XEN_XEN_OS_H_
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#define _MACHINE_XEN_XEN_OS_H_
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#ifdef PAE
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#define CONFIG_X86_PAE
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#endif
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/* Everything below this point is not included by assembler (.S) files. */
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#ifndef __ASSEMBLY__
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/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
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static inline void rep_nop(void)
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{
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__asm__ __volatile__ ( "rep;nop" : : : "memory" );
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}
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#define cpu_relax() rep_nop()
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#ifndef XENHVM
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#ifdef SMP
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extern int gdtset;
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#include <sys/time.h> /* XXX for pcpu.h */
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#include <sys/pcpu.h> /* XXX for PCPU_GET */
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static inline int
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smp_processor_id(void)
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{
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if (__predict_true(gdtset))
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return PCPU_GET(cpuid);
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return 0;
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}
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#else
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#define smp_processor_id() 0
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#endif
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#ifndef PANIC_IF
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#define PANIC_IF(exp) if (__predict_false(exp)) {printf("panic - %s: %s:%d\n",#exp, __FILE__, __LINE__); panic("%s: %s:%d", #exp, __FILE__, __LINE__);}
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#endif
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/*
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* Crude memory allocator for memory allocation early in boot.
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*/
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void *bootmem_alloc(unsigned int size);
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void bootmem_free(void *ptr, unsigned int size);
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/*
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* STI/CLI equivalents. These basically set and clear the virtual
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* event_enable flag in the shared_info structure. Note that when
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* the enable bit is set, there may be pending events to be handled.
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* We may therefore call into do_hypervisor_callback() directly.
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*/
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#define __cli() \
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do { \
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vcpu_info_t *_vcpu; \
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_vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()]; \
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_vcpu->evtchn_upcall_mask = 1; \
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barrier(); \
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} while (0)
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#define __sti() \
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do { \
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vcpu_info_t *_vcpu; \
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barrier(); \
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_vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()]; \
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_vcpu->evtchn_upcall_mask = 0; \
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barrier(); /* unmask then check (avoid races) */ \
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if (__predict_false(_vcpu->evtchn_upcall_pending)) \
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force_evtchn_callback(); \
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} while (0)
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#define __restore_flags(x) \
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do { \
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vcpu_info_t *_vcpu; \
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barrier(); \
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_vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()]; \
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if ((_vcpu->evtchn_upcall_mask = (x)) == 0) { \
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barrier(); /* unmask then check (avoid races) */ \
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if (__predict_false(_vcpu->evtchn_upcall_pending)) \
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force_evtchn_callback(); \
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} \
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} while (0)
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/*
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* Add critical_{enter, exit}?
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*
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*/
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#define __save_and_cli(x) \
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do { \
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vcpu_info_t *_vcpu; \
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_vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()]; \
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(x) = _vcpu->evtchn_upcall_mask; \
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_vcpu->evtchn_upcall_mask = 1; \
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barrier(); \
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} while (0)
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#define cli() __cli()
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#define sti() __sti()
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#define save_flags(x) __save_flags(x)
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#define restore_flags(x) __restore_flags(x)
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#define save_and_cli(x) __save_and_cli(x)
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#define local_irq_save(x) __save_and_cli(x)
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#define local_irq_restore(x) __restore_flags(x)
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#define local_irq_disable() __cli()
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#define local_irq_enable() __sti()
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#define mtx_lock_irqsave(lock, x) {local_irq_save((x)); mtx_lock_spin((lock));}
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#define mtx_unlock_irqrestore(lock, x) {mtx_unlock_spin((lock)); local_irq_restore((x)); }
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#define spin_lock_irqsave mtx_lock_irqsave
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#define spin_unlock_irqrestore mtx_unlock_irqrestore
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#endif /* !XENHVM */
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/* This is a barrier for the compiler only, NOT the processor! */
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#define barrier() __asm__ __volatile__("": : :"memory")
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#define LOCK_PREFIX ""
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#define LOCK ""
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#define ADDR (*(volatile long *) addr)
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/*
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* Make sure gcc doesn't try to be clever and move things around
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* on us. We need to use _exactly_ the address the user gave us,
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* not some alias that contains the same information.
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*/
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typedef struct { volatile int counter; } atomic_t;
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#define xen_xchg(ptr,v) \
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((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
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struct __xchg_dummy { unsigned long a[100]; };
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#define __xg(x) ((volatile struct __xchg_dummy *)(x))
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static __inline unsigned long __xchg(unsigned long x, volatile void * ptr,
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int size)
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{
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switch (size) {
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case 1:
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__asm__ __volatile__("xchgb %b0,%1"
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:"=q" (x)
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:"m" (*__xg(ptr)), "0" (x)
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:"memory");
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break;
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case 2:
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__asm__ __volatile__("xchgw %w0,%1"
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:"=r" (x)
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:"m" (*__xg(ptr)), "0" (x)
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:"memory");
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break;
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case 4:
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__asm__ __volatile__("xchgl %0,%1"
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:"=r" (x)
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:"m" (*__xg(ptr)), "0" (x)
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:"memory");
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break;
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}
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return x;
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}
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/**
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* test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static __inline int test_and_clear_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__ __volatile__( LOCK_PREFIX
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"btrl %2,%1\n\tsbbl %0,%0"
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:"=r" (oldbit),"=m" (ADDR)
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:"Ir" (nr) : "memory");
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return oldbit;
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}
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static __inline int constant_test_bit(int nr, const volatile void * addr)
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{
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return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
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}
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static __inline int variable_test_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__ __volatile__(
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"btl %2,%1\n\tsbbl %0,%0"
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:"=r" (oldbit)
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:"m" (ADDR),"Ir" (nr));
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return oldbit;
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}
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#define test_bit(nr,addr) \
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(__builtin_constant_p(nr) ? \
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constant_test_bit((nr),(addr)) : \
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variable_test_bit((nr),(addr)))
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/**
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* set_bit - Atomically set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* This function is atomic and may not be reordered. See __set_bit()
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* if you do not require the atomic guarantees.
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static __inline__ void set_bit(int nr, volatile void * addr)
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{
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__asm__ __volatile__( LOCK_PREFIX
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"btsl %1,%0"
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:"=m" (ADDR)
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:"Ir" (nr));
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}
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/**
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* clear_bit - Clears a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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* clear_bit() is atomic and may not be reordered. However, it does
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* not contain a memory barrier, so if it is used for locking purposes,
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* you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
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* in order to ensure changes are visible on other processors.
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*/
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static __inline__ void clear_bit(int nr, volatile void * addr)
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{
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__asm__ __volatile__( LOCK_PREFIX
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"btrl %1,%0"
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:"=m" (ADDR)
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:"Ir" (nr));
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}
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/**
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* atomic_inc - increment atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1. Note that the guaranteed
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* useful range of an atomic_t is only 24 bits.
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*/
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static __inline__ void atomic_inc(atomic_t *v)
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{
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__asm__ __volatile__(
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LOCK "incl %0"
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:"=m" (v->counter)
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:"m" (v->counter));
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}
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#define rdtscll(val) \
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__asm__ __volatile__("rdtsc" : "=A" (val))
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#endif /* !__ASSEMBLY__ */
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#endif /* _MACHINE_XEN_XEN_OS_H_ */
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