freebsd-skq/sys/mips
Konstantin Belousov 8954a9a4e6 Add the atomic_thread_fence() family of functions with intent to
provide a semantic defined by the C11 fences with corresponding
memory_order.

atomic_thread_fence_acq() gives r | r, w, where r and w are read and
write accesses, and | denotes the fence itself.

atomic_thread_fence_rel() is r, w | w.

atomic_thread_fence_acq_rel() is the combination of the acquire and
release in single operation.  Note that reads after the acq+rel fence
could be made visible before writes preceeding the fence.

atomic_thread_fence_seq_cst() orders all accesses before/after the
fence, and the fence itself is globally ordered against other
sequentially consistent atomic operations.

Reviewed by:	alc
Discussed with:	bde
Sponsored by:	The FreeBSD Foundation
MFC after:	3 weeks
2015-07-08 18:12:24 +00:00
..
adm5120 Add support for the uart classes to set their default register shift value. 2015-04-11 17:16:23 +00:00
alchemy Fix a typo introduced in r257338. 2013-10-31 02:27:16 +00:00
atheros Reshuffle all of the DDR flush operations into a single switch/mux, 2015-07-04 03:05:57 +00:00
beri Provide the number of interrupt resources added to the list 2015-05-15 13:55:18 +00:00
cavium Huge cleanup of random(4) code. 2015-06-30 17:00:45 +00:00
conf o Add a description for virtio block device implemented 2015-07-03 14:46:57 +00:00
gxemul
idt Mechanically convert to if_inc_counter(). 2014-09-19 09:19:49 +00:00
include Add the atomic_thread_fence() family of functions with intent to 2015-07-08 18:12:24 +00:00
malta Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this 2013-11-30 22:17:27 +00:00
mips The kernel sends signals to the processes via ABI specific sv_sendsig method. 2015-05-24 17:56:02 +00:00
nlm CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten 2015-05-22 17:05:21 +00:00
rmi CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than ten 2015-05-22 17:05:21 +00:00
rt305x Add support for the uart classes to set their default register shift value. 2015-04-11 17:16:23 +00:00
sentry5
sibyte