4fca026f47
the Raspberry Pi B we support most of the devices are already supported, however the base address has changed. A few items are not working, or missing. The main ones are: * DMA doesn't work in the sdhci driver. * Enabling vchiq halts the boot, may be interrupt related. * There is no U-Boot port yet so the DTB is embedded in the kernel. The last point will make it difficult to boot FreeBSD, however there is support for the Raspberry Pi 2 in the U-Boot git repo. As I have not tested this it is left as an open task to create a port to build. X-MFC: When the above issues are fixed Sponsored by: ABT Systems Ltd
241 lines
6.4 KiB
C
241 lines
6.4 KiB
C
/*-
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* Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org>
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* All rights reserved.
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*
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* Based on OMAP3 INTC code by Ben Gray
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/ktr.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#ifdef SOC_BCM2836
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#include <arm/broadcom/bcm2835/bcm2836.h>
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#endif
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#define INTC_PENDING_BASIC 0x00
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#define INTC_PENDING_BANK1 0x04
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#define INTC_PENDING_BANK2 0x08
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#define INTC_FIQ_CONTROL 0x0C
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#define INTC_ENABLE_BANK1 0x10
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#define INTC_ENABLE_BANK2 0x14
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#define INTC_ENABLE_BASIC 0x18
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#define INTC_DISABLE_BANK1 0x1C
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#define INTC_DISABLE_BANK2 0x20
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#define INTC_DISABLE_BASIC 0x24
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#define BANK1_START 8
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#define BANK1_END (BANK1_START + 32 - 1)
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#define BANK2_START (BANK1_START + 32)
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#define BANK2_END (BANK2_START + 32 - 1)
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#define BANK3_START (BANK2_START + 32)
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#define BANK3_END (BANK3_START + 32 - 1)
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#define IS_IRQ_BASIC(n) (((n) >= 0) && ((n) < BANK1_START))
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#define IS_IRQ_BANK1(n) (((n) >= BANK1_START) && ((n) <= BANK1_END))
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#define IS_IRQ_BANK2(n) (((n) >= BANK2_START) && ((n) <= BANK2_END))
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#define ID_IRQ_BCM2836(n) (((n) >= BANK3_START) && ((n) <= BANK3_END))
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#define IRQ_BANK1(n) ((n) - BANK1_START)
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#define IRQ_BANK2(n) ((n) - BANK2_START)
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#ifdef DEBUG
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#define dprintf(fmt, args...) printf(fmt, ##args)
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#else
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#define dprintf(fmt, args...)
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#endif
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struct bcm_intc_softc {
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device_t sc_dev;
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struct resource * intc_res;
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bus_space_tag_t intc_bst;
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bus_space_handle_t intc_bsh;
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};
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static struct bcm_intc_softc *bcm_intc_sc = NULL;
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#define intc_read_4(_sc, reg) \
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bus_space_read_4((_sc)->intc_bst, (_sc)->intc_bsh, (reg))
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#define intc_write_4(_sc, reg, val) \
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bus_space_write_4((_sc)->intc_bst, (_sc)->intc_bsh, (reg), (val))
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static int
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bcm_intc_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "broadcom,bcm2835-armctrl-ic"))
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return (ENXIO);
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device_set_desc(dev, "BCM2835 Interrupt Controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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bcm_intc_attach(device_t dev)
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{
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struct bcm_intc_softc *sc = device_get_softc(dev);
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int rid = 0;
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sc->sc_dev = dev;
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if (bcm_intc_sc)
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return (ENXIO);
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sc->intc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
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if (sc->intc_res == NULL) {
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device_printf(dev, "could not allocate memory resource\n");
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return (ENXIO);
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}
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sc->intc_bst = rman_get_bustag(sc->intc_res);
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sc->intc_bsh = rman_get_bushandle(sc->intc_res);
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bcm_intc_sc = sc;
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return (0);
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}
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static device_method_t bcm_intc_methods[] = {
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DEVMETHOD(device_probe, bcm_intc_probe),
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DEVMETHOD(device_attach, bcm_intc_attach),
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{ 0, 0 }
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};
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static driver_t bcm_intc_driver = {
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"intc",
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bcm_intc_methods,
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sizeof(struct bcm_intc_softc),
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};
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static devclass_t bcm_intc_devclass;
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DRIVER_MODULE(intc, simplebus, bcm_intc_driver, bcm_intc_devclass, 0, 0);
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int
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arm_get_next_irq(int last_irq)
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{
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struct bcm_intc_softc *sc = bcm_intc_sc;
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uint32_t pending;
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int32_t irq = last_irq + 1;
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#ifdef SOC_BCM2836
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int ret;
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#endif
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/* Sanity check */
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if (irq < 0)
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irq = 0;
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#ifdef SOC_BCM2836
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if ((ret = bcm2836_get_next_irq(irq)) >= 0)
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return (ret + BANK3_START);
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#endif
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/* TODO: should we mask last_irq? */
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if (irq < BANK1_START) {
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pending = intc_read_4(sc, INTC_PENDING_BASIC);
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if ((pending & 0xFF) == 0) {
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irq = BANK1_START; /* skip to next bank */
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} else do {
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if (pending & (1 << irq))
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return irq;
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irq++;
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} while (irq < BANK1_START);
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}
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if (irq < BANK2_START) {
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pending = intc_read_4(sc, INTC_PENDING_BANK1);
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if (pending == 0) {
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irq = BANK2_START; /* skip to next bank */
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} else do {
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if (pending & (1 << IRQ_BANK1(irq)))
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return irq;
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irq++;
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} while (irq < BANK2_START);
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}
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if (irq < BANK3_START) {
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pending = intc_read_4(sc, INTC_PENDING_BANK2);
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if (pending != 0) do {
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if (pending & (1 << IRQ_BANK2(irq)))
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return irq;
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irq++;
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} while (irq < BANK3_START);
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}
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return (-1);
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}
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void
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arm_mask_irq(uintptr_t nb)
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{
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struct bcm_intc_softc *sc = bcm_intc_sc;
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dprintf("%s: %d\n", __func__, nb);
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if (IS_IRQ_BASIC(nb))
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intc_write_4(sc, INTC_DISABLE_BASIC, (1 << nb));
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else if (IS_IRQ_BANK1(nb))
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intc_write_4(sc, INTC_DISABLE_BANK1, (1 << IRQ_BANK1(nb)));
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else if (IS_IRQ_BANK2(nb))
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intc_write_4(sc, INTC_DISABLE_BANK2, (1 << IRQ_BANK2(nb)));
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#ifdef SOC_BCM2836
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else if (ID_IRQ_BCM2836(nb))
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bcm2836_mask_irq(nb - BANK3_START);
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#endif
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else
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printf("arm_mask_irq: Invalid IRQ number: %d\n", nb);
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}
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void
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arm_unmask_irq(uintptr_t nb)
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{
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struct bcm_intc_softc *sc = bcm_intc_sc;
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dprintf("%s: %d\n", __func__, nb);
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if (IS_IRQ_BASIC(nb))
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intc_write_4(sc, INTC_ENABLE_BASIC, (1 << nb));
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else if (IS_IRQ_BANK1(nb))
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intc_write_4(sc, INTC_ENABLE_BANK1, (1 << IRQ_BANK1(nb)));
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else if (IS_IRQ_BANK2(nb))
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intc_write_4(sc, INTC_ENABLE_BANK2, (1 << IRQ_BANK2(nb)));
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#ifdef SOC_BCM2836
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else if (ID_IRQ_BCM2836(nb))
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bcm2836_unmask_irq(nb - BANK3_START);
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#endif
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else
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printf("arm_mask_irq: Invalid IRQ number: %d\n", nb);
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}
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