Ian Lepore 4b7fcd31e1 Add a new cache maintenance function, idcache_inv_all, to the table, and
implementations for each of the chips we support.  Most chips up through
armv6 can use the armv4 implementation which has a single coprocessor
opcode for this operation.  The rather more complex armv7 implementation
comes from netbsd.
2014-02-24 01:41:58 +00:00
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