e6c59cd5c0
This update brings few features: o Support for the setmaster/dropmaster ioctls. For instance, they are used to run multiple X servers simultaneously. o Support for minor devices. The only user-visible change is a new entry in /dev/dri but it is useless at the moment. This is a first step to support render nodes [1]. The main benefit is to greatly reduce the diff with Linux (at the expense of an unreadable commit diff). Hopefully, next upgrades will be easier. No updates were made to the drivers, beside adapting them to API changes. [1] https://en.wikipedia.org/wiki/Direct_Rendering_Manager#Render_nodes Tested by: Many people MFC after: 1 month Relnotes: yes
510 lines
14 KiB
C
510 lines
14 KiB
C
/*
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* Copyright 2009 VMware, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Michel Dänzer
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <dev/drm2/drmP.h>
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#include <dev/drm2/radeon/radeon_drm.h>
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#include "radeon_reg.h"
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#include "radeon.h"
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#define RADEON_TEST_COPY_BLIT 1
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#define RADEON_TEST_COPY_DMA 0
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/* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
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static void radeon_do_test_moves(struct radeon_device *rdev, int flag)
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{
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struct radeon_bo *vram_obj = NULL;
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struct radeon_bo **gtt_obj = NULL;
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struct radeon_fence *fence = NULL;
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uint64_t gtt_addr, vram_addr;
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unsigned i, n, size;
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int r, ring;
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switch (flag) {
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case RADEON_TEST_COPY_DMA:
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ring = radeon_copy_dma_ring_index(rdev);
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break;
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case RADEON_TEST_COPY_BLIT:
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ring = radeon_copy_blit_ring_index(rdev);
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break;
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default:
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DRM_ERROR("Unknown copy method\n");
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return;
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}
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size = 1024 * 1024;
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/* Number of tests =
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* (Total GTT - IB pool - writeback page - ring buffers) / test size
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*/
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n = rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024;
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for (i = 0; i < RADEON_NUM_RINGS; ++i)
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n -= rdev->ring[i].ring_size;
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if (rdev->wb.wb_obj)
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n -= RADEON_GPU_PAGE_SIZE;
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if (rdev->ih.ring_obj)
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n -= rdev->ih.ring_size;
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n /= size;
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gtt_obj = malloc(n * sizeof(*gtt_obj), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
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if (!gtt_obj) {
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DRM_ERROR("Failed to allocate %d pointers\n", n);
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r = 1;
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goto out_cleanup;
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}
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r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
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NULL, &vram_obj);
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if (r) {
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DRM_ERROR("Failed to create VRAM object\n");
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goto out_cleanup;
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}
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r = radeon_bo_reserve(vram_obj, false);
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if (unlikely(r != 0))
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goto out_cleanup;
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r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
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if (r) {
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DRM_ERROR("Failed to pin VRAM object\n");
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goto out_cleanup;
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}
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for (i = 0; i < n; i++) {
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void *gtt_map, *vram_map;
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void **gtt_start, **gtt_end;
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void **vram_start, **vram_end;
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r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
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RADEON_GEM_DOMAIN_GTT, NULL, gtt_obj + i);
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if (r) {
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DRM_ERROR("Failed to create GTT object %d\n", i);
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goto out_cleanup;
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}
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r = radeon_bo_reserve(gtt_obj[i], false);
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if (unlikely(r != 0))
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goto out_cleanup;
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r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, >t_addr);
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if (r) {
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DRM_ERROR("Failed to pin GTT object %d\n", i);
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goto out_cleanup;
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}
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r = radeon_bo_kmap(gtt_obj[i], >t_map);
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if (r) {
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DRM_ERROR("Failed to map GTT object %d\n", i);
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goto out_cleanup;
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}
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for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size);
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gtt_start < gtt_end;
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gtt_start++)
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*gtt_start = gtt_start;
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radeon_bo_kunmap(gtt_obj[i]);
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if (ring == R600_RING_TYPE_DMA_INDEX)
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r = radeon_copy_dma(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
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else
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r = radeon_copy_blit(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
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if (r) {
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DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
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goto out_cleanup;
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}
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r = radeon_fence_wait(fence, false);
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if (r) {
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DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
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goto out_cleanup;
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}
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radeon_fence_unref(&fence);
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r = radeon_bo_kmap(vram_obj, &vram_map);
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if (r) {
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DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
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goto out_cleanup;
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}
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for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size),
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vram_start = vram_map, vram_end = (void *)((uintptr_t)vram_map + size);
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vram_start < vram_end;
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gtt_start++, vram_start++) {
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if (*vram_start != gtt_start) {
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DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
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"expected 0x%p (GTT/VRAM offset "
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"0x%16llx/0x%16llx)\n",
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i, *vram_start, gtt_start,
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(unsigned long long)
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((uintptr_t)gtt_addr - (uintptr_t)rdev->mc.gtt_start +
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(uintptr_t)gtt_start - (uintptr_t)gtt_map),
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(unsigned long long)
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((uintptr_t)vram_addr - (uintptr_t)rdev->mc.vram_start +
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(uintptr_t)gtt_start - (uintptr_t)gtt_map));
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radeon_bo_kunmap(vram_obj);
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goto out_cleanup;
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}
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*vram_start = vram_start;
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}
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radeon_bo_kunmap(vram_obj);
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if (ring == R600_RING_TYPE_DMA_INDEX)
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r = radeon_copy_dma(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
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else
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r = radeon_copy_blit(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
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if (r) {
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DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
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goto out_cleanup;
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}
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r = radeon_fence_wait(fence, false);
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if (r) {
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DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
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goto out_cleanup;
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}
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radeon_fence_unref(&fence);
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r = radeon_bo_kmap(gtt_obj[i], >t_map);
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if (r) {
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DRM_ERROR("Failed to map GTT object after copy %d\n", i);
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goto out_cleanup;
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}
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for (gtt_start = gtt_map, gtt_end = (void *)((uintptr_t)gtt_map + size),
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vram_start = vram_map, vram_end = (void *)((uintptr_t)vram_map + size);
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gtt_start < gtt_end;
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gtt_start++, vram_start++) {
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if (*gtt_start != vram_start) {
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DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
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"expected 0x%p (VRAM/GTT offset "
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"0x%16llx/0x%16llx)\n",
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i, *gtt_start, vram_start,
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(unsigned long long)
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((uintptr_t)vram_addr - (uintptr_t)rdev->mc.vram_start +
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(uintptr_t)vram_start - (uintptr_t)vram_map),
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(unsigned long long)
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((uintptr_t)gtt_addr - (uintptr_t)rdev->mc.gtt_start +
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(uintptr_t)vram_start - (uintptr_t)vram_map));
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radeon_bo_kunmap(gtt_obj[i]);
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goto out_cleanup;
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}
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}
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radeon_bo_kunmap(gtt_obj[i]);
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DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%jx\n",
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(uintmax_t)gtt_addr - rdev->mc.gtt_start);
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}
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out_cleanup:
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if (vram_obj) {
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if (radeon_bo_is_reserved(vram_obj)) {
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radeon_bo_unpin(vram_obj);
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radeon_bo_unreserve(vram_obj);
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}
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radeon_bo_unref(&vram_obj);
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}
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if (gtt_obj) {
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for (i = 0; i < n; i++) {
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if (gtt_obj[i]) {
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if (radeon_bo_is_reserved(gtt_obj[i])) {
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radeon_bo_unpin(gtt_obj[i]);
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radeon_bo_unreserve(gtt_obj[i]);
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}
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radeon_bo_unref(>t_obj[i]);
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}
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}
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free(gtt_obj, DRM_MEM_DRIVER);
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}
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if (fence) {
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radeon_fence_unref(&fence);
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}
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if (r) {
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DRM_ERROR("Error while testing BO move.\n");
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}
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}
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void radeon_test_moves(struct radeon_device *rdev)
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{
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if (rdev->asic->copy.dma)
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radeon_do_test_moves(rdev, RADEON_TEST_COPY_DMA);
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if (rdev->asic->copy.blit)
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radeon_do_test_moves(rdev, RADEON_TEST_COPY_BLIT);
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}
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void radeon_test_ring_sync(struct radeon_device *rdev,
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struct radeon_ring *ringA,
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struct radeon_ring *ringB)
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{
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struct radeon_fence *fence1 = NULL, *fence2 = NULL;
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struct radeon_semaphore *semaphore = NULL;
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int r;
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r = radeon_semaphore_create(rdev, &semaphore);
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if (r) {
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DRM_ERROR("Failed to create semaphore\n");
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goto out_cleanup;
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}
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r = radeon_ring_lock(rdev, ringA, 64);
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if (r) {
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DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
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goto out_cleanup;
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}
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radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
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r = radeon_fence_emit(rdev, &fence1, ringA->idx);
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if (r) {
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DRM_ERROR("Failed to emit fence 1\n");
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radeon_ring_unlock_undo(rdev, ringA);
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goto out_cleanup;
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}
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radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
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r = radeon_fence_emit(rdev, &fence2, ringA->idx);
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if (r) {
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DRM_ERROR("Failed to emit fence 2\n");
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radeon_ring_unlock_undo(rdev, ringA);
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goto out_cleanup;
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}
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radeon_ring_unlock_commit(rdev, ringA);
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mdelay(1000);
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if (radeon_fence_signaled(fence1)) {
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DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n");
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goto out_cleanup;
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}
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r = radeon_ring_lock(rdev, ringB, 64);
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if (r) {
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DRM_ERROR("Failed to lock ring B %p\n", ringB);
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goto out_cleanup;
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}
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radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
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radeon_ring_unlock_commit(rdev, ringB);
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r = radeon_fence_wait(fence1, false);
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if (r) {
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DRM_ERROR("Failed to wait for sync fence 1\n");
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goto out_cleanup;
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}
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mdelay(1000);
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if (radeon_fence_signaled(fence2)) {
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DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n");
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goto out_cleanup;
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}
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r = radeon_ring_lock(rdev, ringB, 64);
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if (r) {
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DRM_ERROR("Failed to lock ring B %p\n", ringB);
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goto out_cleanup;
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}
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radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
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radeon_ring_unlock_commit(rdev, ringB);
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r = radeon_fence_wait(fence2, false);
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if (r) {
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DRM_ERROR("Failed to wait for sync fence 1\n");
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goto out_cleanup;
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}
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out_cleanup:
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radeon_semaphore_free(rdev, &semaphore, NULL);
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if (fence1)
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radeon_fence_unref(&fence1);
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if (fence2)
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radeon_fence_unref(&fence2);
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if (r)
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DRM_ERROR("Error while testing ring sync (%d).\n", r);
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}
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static void radeon_test_ring_sync2(struct radeon_device *rdev,
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struct radeon_ring *ringA,
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struct radeon_ring *ringB,
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struct radeon_ring *ringC)
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{
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struct radeon_fence *fenceA = NULL, *fenceB = NULL;
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struct radeon_semaphore *semaphore = NULL;
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bool sigA, sigB;
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int i, r;
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r = radeon_semaphore_create(rdev, &semaphore);
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if (r) {
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DRM_ERROR("Failed to create semaphore\n");
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goto out_cleanup;
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}
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r = radeon_ring_lock(rdev, ringA, 64);
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if (r) {
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DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
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goto out_cleanup;
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}
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radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
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r = radeon_fence_emit(rdev, &fenceA, ringA->idx);
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if (r) {
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DRM_ERROR("Failed to emit sync fence 1\n");
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radeon_ring_unlock_undo(rdev, ringA);
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goto out_cleanup;
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}
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radeon_ring_unlock_commit(rdev, ringA);
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r = radeon_ring_lock(rdev, ringB, 64);
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if (r) {
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DRM_ERROR("Failed to lock ring B %d\n", ringB->idx);
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goto out_cleanup;
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}
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radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore);
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r = radeon_fence_emit(rdev, &fenceB, ringB->idx);
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if (r) {
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DRM_ERROR("Failed to create sync fence 2\n");
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radeon_ring_unlock_undo(rdev, ringB);
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goto out_cleanup;
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}
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radeon_ring_unlock_commit(rdev, ringB);
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mdelay(1000);
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if (radeon_fence_signaled(fenceA)) {
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DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
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goto out_cleanup;
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}
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if (radeon_fence_signaled(fenceB)) {
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DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
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goto out_cleanup;
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}
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r = radeon_ring_lock(rdev, ringC, 64);
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if (r) {
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DRM_ERROR("Failed to lock ring B %p\n", ringC);
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goto out_cleanup;
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}
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radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
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radeon_ring_unlock_commit(rdev, ringC);
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for (i = 0; i < 30; ++i) {
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mdelay(100);
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sigA = radeon_fence_signaled(fenceA);
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sigB = radeon_fence_signaled(fenceB);
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if (sigA || sigB)
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break;
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}
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if (!sigA && !sigB) {
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DRM_ERROR("Neither fence A nor B has been signaled\n");
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goto out_cleanup;
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} else if (sigA && sigB) {
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DRM_ERROR("Both fence A and B has been signaled\n");
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goto out_cleanup;
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}
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DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B');
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r = radeon_ring_lock(rdev, ringC, 64);
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if (r) {
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DRM_ERROR("Failed to lock ring B %p\n", ringC);
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goto out_cleanup;
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}
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radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
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radeon_ring_unlock_commit(rdev, ringC);
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mdelay(1000);
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r = radeon_fence_wait(fenceA, false);
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if (r) {
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DRM_ERROR("Failed to wait for sync fence A\n");
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goto out_cleanup;
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}
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r = radeon_fence_wait(fenceB, false);
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if (r) {
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DRM_ERROR("Failed to wait for sync fence B\n");
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goto out_cleanup;
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}
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out_cleanup:
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radeon_semaphore_free(rdev, &semaphore, NULL);
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if (fenceA)
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radeon_fence_unref(&fenceA);
|
|
|
|
if (fenceB)
|
|
radeon_fence_unref(&fenceB);
|
|
|
|
if (r)
|
|
DRM_ERROR("Error while testing ring sync (%d).\n", r);
|
|
}
|
|
|
|
void radeon_test_syncing(struct radeon_device *rdev)
|
|
{
|
|
int i, j, k;
|
|
|
|
for (i = 1; i < RADEON_NUM_RINGS; ++i) {
|
|
struct radeon_ring *ringA = &rdev->ring[i];
|
|
if (!ringA->ready)
|
|
continue;
|
|
|
|
for (j = 0; j < i; ++j) {
|
|
struct radeon_ring *ringB = &rdev->ring[j];
|
|
if (!ringB->ready)
|
|
continue;
|
|
|
|
DRM_INFO("Testing syncing between rings %d and %d...\n", i, j);
|
|
radeon_test_ring_sync(rdev, ringA, ringB);
|
|
|
|
DRM_INFO("Testing syncing between rings %d and %d...\n", j, i);
|
|
radeon_test_ring_sync(rdev, ringB, ringA);
|
|
|
|
for (k = 0; k < j; ++k) {
|
|
struct radeon_ring *ringC = &rdev->ring[k];
|
|
if (!ringC->ready)
|
|
continue;
|
|
|
|
DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k);
|
|
radeon_test_ring_sync2(rdev, ringA, ringB, ringC);
|
|
|
|
DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j);
|
|
radeon_test_ring_sync2(rdev, ringA, ringC, ringB);
|
|
|
|
DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k);
|
|
radeon_test_ring_sync2(rdev, ringB, ringA, ringC);
|
|
|
|
DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i);
|
|
radeon_test_ring_sync2(rdev, ringB, ringC, ringA);
|
|
|
|
DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j);
|
|
radeon_test_ring_sync2(rdev, ringC, ringA, ringB);
|
|
|
|
DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i);
|
|
radeon_test_ring_sync2(rdev, ringC, ringB, ringA);
|
|
}
|
|
}
|
|
}
|
|
}
|