787 lines
32 KiB
C
787 lines
32 KiB
C
/******************************************************************************
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*Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
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*
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*Redistribution and use in source and binary forms, with or without modification, are permitted provided
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*that the following conditions are met:
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*1. Redistributions of source code must retain the above copyright notice, this list of conditions and the
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*following disclaimer.
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*2. Redistributions in binary form must reproduce the above copyright notice,
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*this list of conditions and the following disclaimer in the documentation and/or other materials provided
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*with the distribution.
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*
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*THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
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*WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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*FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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*FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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*NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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*BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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*LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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*SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
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******************************************************************************/
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/* $FreeBSD$ */
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/******************************************************************************
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This program is part of PMC-Sierra initiator/target device driver.
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The functions here are commonly used by different type of drivers that support
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PMC-Sierra storage network initiator hardware.
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******************************************************************************/
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MALLOC_DEFINE( M_PMC_MMAL, "agtiapi_MemAlloc malloc",
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"allocated from agtiapi_MemAlloc as simple malloc case" );
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/*****************************************************************************
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agtiapi_DelayMSec()
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Purpose:
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Busy wait for number of mili-seconds
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Parameters:
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U32 MiliSeconds (IN) Number of mili-seconds to delay
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Return:
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Note:
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*****************************************************************************/
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STATIC void agtiapi_DelayMSec( U32 MiliSeconds )
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{
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DELAY(MiliSeconds * 1000); // DELAY takes in usecs
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}
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/******************************************************************************
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agtiapi_typhAlloc()
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Purpose:
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Preallocation handling
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Allocate DMA memory which will be divided among proper pointers in
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agtiapi_MemAlloc() later
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Parameters:
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ag_card_info_t *thisCardInst (IN)
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Return:
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AGTIAPI_SUCCESS - success
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AGTIAPI_FAIL - fail
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******************************************************************************/
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STATIC agBOOLEAN agtiapi_typhAlloc( ag_card_info_t *thisCardInst )
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{
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struct agtiapi_softc *pmsc = thisCardInst->pCard;
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int wait = 0;
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if( bus_dma_tag_create( bus_get_dma_tag(pmsc->my_dev), // parent
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32, // alignment
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0, // boundary
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BUS_SPACE_MAXADDR, // lowaddr
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BUS_SPACE_MAXADDR, // highaddr
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NULL, // filter
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NULL, // filterarg
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pmsc->typhn, // maxsize (size)
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1, // number of segments
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pmsc->typhn, // maxsegsize
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0, // flags
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NULL, // lockfunc
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NULL, // lockarg
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&pmsc->typh_dmat ) ) {
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printf( "agtiapi_typhAlloc: Can't create no-cache mem tag\n" );
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return AGTIAPI_FAIL;
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}
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if( bus_dmamem_alloc( pmsc->typh_dmat,
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&pmsc->typh_mem,
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BUS_DMA_WAITOK | BUS_DMA_ZERO | BUS_DMA_NOCACHE,
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&pmsc->typh_mapp ) ) {
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printf( "agtiapi_typhAlloc: Cannot allocate cache mem %d\n",
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pmsc->typhn );
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return AGTIAPI_FAIL;
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}
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if ( bus_dmamap_load( pmsc->typh_dmat,
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pmsc->typh_mapp,
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pmsc->typh_mem,
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pmsc->typhn,
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agtiapi_MemoryCB, // try reuse of CB for same goal
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&pmsc->typh_busaddr,
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0 ) || !pmsc->typh_busaddr ) {
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for( ; wait < 20; wait++ ) {
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if( pmsc->typh_busaddr ) break;
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DELAY( 50000 );
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}
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if( ! pmsc->typh_busaddr ) {
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printf( "agtiapi_typhAlloc: cache mem won't load %d\n",
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pmsc->typhn );
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return AGTIAPI_FAIL;
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}
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}
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pmsc->typhIdx = 0;
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pmsc->tyPhsIx = 0;
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return AGTIAPI_SUCCESS;
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}
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/******************************************************************************
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agtiapi_InitResource()
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Purpose:
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Mapping PCI memory space
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Allocate and initialize per card based resource
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Parameters:
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ag_card_info_t *pCardInfo (IN)
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Return:
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AGTIAPI_SUCCESS - success
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AGTIAPI_FAIL - fail
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Note:
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******************************************************************************/
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STATIC agBOOLEAN agtiapi_InitResource( ag_card_info_t *thisCardInst )
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{
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struct agtiapi_softc *pmsc = thisCardInst->pCard;
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device_t devx = thisCardInst->pPCIDev;
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//AGTIAPI_PRINTK( "agtiapi_InitResource: begin; pointer values %p / %p \n",
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// devx, thisCardInst );
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// no IO mapped card implementation, we'll implement memory mapping
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if( agtiapi_typhAlloc( thisCardInst ) == AGTIAPI_FAIL ) {
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printf( "agtiapi_InitResource: failed call to agtiapi_typhAlloc \n" );
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return AGTIAPI_FAIL;
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}
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AGTIAPI_PRINTK( "agtiapi_InitResource: dma alloc MemSpan %p -- %p\n",
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(void*) pmsc->typh_busaddr,
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(void*) ( (U32_64)pmsc->typh_busaddr + pmsc->typhn ) );
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// logical BARs for SPC:
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// bar 0 and 1 - logical BAR0
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// bar 2 and 3 - logical BAR1
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// bar4 - logical BAR2
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// bar5 - logical BAR3
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// Skiping the assignments for bar 1 and bar 3 (making bar 0, 2 64-bit):
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U32 bar;
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U32 lBar = 0; // logicalBar
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for (bar = 0; bar < PCI_NUMBER_BARS; bar++) {
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if ((bar==1) || (bar==3))
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continue;
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thisCardInst->pciMemBaseRIDSpc[lBar] = PCIR_BAR(bar);
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thisCardInst->pciMemBaseRscSpc[lBar] =
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bus_alloc_resource_any( devx,
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SYS_RES_MEMORY,
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&(thisCardInst->pciMemBaseRIDSpc[lBar]),
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RF_ACTIVE );
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AGTIAPI_PRINTK( "agtiapi_InitResource: bus_alloc_resource_any rtn %p \n",
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thisCardInst->pciMemBaseRscSpc[lBar] );
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if ( thisCardInst->pciMemBaseRscSpc[lBar] != NULL ) {
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thisCardInst->pciMemVirtAddrSpc[lBar] =
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(caddr_t)rman_get_virtual(
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thisCardInst->pciMemBaseRscSpc[lBar] );
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thisCardInst->pciMemBaseSpc[lBar] =
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bus_get_resource_start( devx, SYS_RES_MEMORY,
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thisCardInst->pciMemBaseRIDSpc[lBar]);
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thisCardInst->pciMemSizeSpc[lBar] =
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bus_get_resource_count( devx, SYS_RES_MEMORY,
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thisCardInst->pciMemBaseRIDSpc[lBar] );
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AGTIAPI_PRINTK( "agtiapi_InitResource: PCI: bar %d, lBar %d "
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"VirtAddr=%lx, len=%d\n", bar, lBar,
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(long unsigned int)thisCardInst->pciMemVirtAddrSpc[lBar],
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thisCardInst->pciMemSizeSpc[lBar] );
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}
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else {
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thisCardInst->pciMemVirtAddrSpc[lBar] = 0;
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thisCardInst->pciMemBaseSpc[lBar] = 0;
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thisCardInst->pciMemSizeSpc[lBar] = 0;
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}
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lBar++;
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}
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thisCardInst->pciMemVirtAddr = thisCardInst->pciMemVirtAddrSpc[0];
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thisCardInst->pciMemSize = thisCardInst->pciMemSizeSpc[0];
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thisCardInst->pciMemBase = thisCardInst->pciMemBaseSpc[0];
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// Allocate all TI data structure required resources.
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// tiLoLevelResource
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U32 numVal;
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ag_resource_info_t *pRscInfo;
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pRscInfo = &thisCardInst->tiRscInfo;
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pRscInfo->tiLoLevelResource.loLevelOption.pciFunctionNumber =
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pci_get_function( devx );
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struct timeval tv;
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tv.tv_sec = 1;
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tv.tv_usec = 0;
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int ticksPerSec;
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ticksPerSec = tvtohz( &tv );
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int uSecPerTick = 1000000/USEC_PER_TICK;
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if (pRscInfo->tiLoLevelResource.loLevelMem.count != 0) {
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//AGTIAPI_INIT("agtiapi_InitResource: loLevelMem count = %d\n",
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// pRscInfo->tiLoLevelResource.loLevelMem.count);
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// adjust tick value to meet Linux requirement
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pRscInfo->tiLoLevelResource.loLevelOption.usecsPerTick = uSecPerTick;
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AGTIAPI_PRINTK( "agtiapi_InitResource: "
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"pRscInfo->tiLoLevelResource.loLevelOption.usecsPerTick"
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" 0x%x\n",
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pRscInfo->tiLoLevelResource.loLevelOption.usecsPerTick );
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for( numVal = 0; numVal < pRscInfo->tiLoLevelResource.loLevelMem.count;
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numVal++ ) {
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if( pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].totalLength ==
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0 ) {
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AGTIAPI_PRINTK("agtiapi_InitResource: skip ZERO %d\n", numVal);
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continue;
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}
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// check for 64 bit alignment
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if ( pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].alignment <
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AGTIAPI_64BIT_ALIGN ) {
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AGTIAPI_PRINTK("agtiapi_InitResource: set ALIGN %d\n", numVal);
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pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].alignment =
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AGTIAPI_64BIT_ALIGN;
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}
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if( ((pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].type
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& (BIT(0) | BIT(1))) == TI_DMA_MEM) ||
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((pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].type
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& (BIT(0) | BIT(1))) == TI_CACHED_DMA_MEM)) {
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if ( thisCardInst->dmaIndex >=
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sizeof(thisCardInst->tiDmaMem) /
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sizeof(thisCardInst->tiDmaMem[0]) ) {
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AGTIAPI_PRINTK( "Invalid dmaIndex %d ERROR\n",
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thisCardInst->dmaIndex );
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return AGTIAPI_FAIL;
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}
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thisCardInst->tiDmaMem[thisCardInst->dmaIndex].type =
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#ifdef CACHED_DMA
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pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].type
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& (BIT(0) | BIT(1));
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#else
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TI_DMA_MEM;
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#endif
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if( agtiapi_MemAlloc( thisCardInst,
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&thisCardInst->tiDmaMem[thisCardInst->dmaIndex].dmaVirtAddr,
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&thisCardInst->tiDmaMem[thisCardInst->dmaIndex].dmaPhysAddr,
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&pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].virtPtr,
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&pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].
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physAddrUpper,
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&pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].
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physAddrLower,
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pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].totalLength,
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thisCardInst->tiDmaMem[thisCardInst->dmaIndex].type,
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pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].alignment)
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!= AGTIAPI_SUCCESS ) {
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return AGTIAPI_FAIL;
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}
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thisCardInst->tiDmaMem[thisCardInst->dmaIndex].memSize =
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pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].totalLength;
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//AGTIAPI_INIT("agtiapi_InitResource: LoMem %d dmaIndex=%d DMA virt"
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// " %p, phys 0x%x, length %d align %d\n",
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// numVal, pCardInfo->dmaIndex,
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// pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].virtPtr,
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// pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].physAddrLower,
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// pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].totalLength,
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// pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].alignment);
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thisCardInst->dmaIndex++;
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}
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else if ( (pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].type &
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(BIT(0) | BIT(1))) == TI_CACHED_MEM) {
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if (thisCardInst->cacheIndex >=
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sizeof(thisCardInst->tiCachedMem) /
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sizeof(thisCardInst->tiCachedMem[0])) {
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AGTIAPI_PRINTK( "Invalid cacheIndex %d ERROR\n",
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thisCardInst->cacheIndex );
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return AGTIAPI_FAIL;
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}
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if ( agtiapi_MemAlloc( thisCardInst,
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&thisCardInst->tiCachedMem[thisCardInst->cacheIndex],
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(vm_paddr_t *)agNULL,
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&pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].virtPtr,
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(U32 *)agNULL,
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(U32 *)agNULL,
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pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].totalLength,
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TI_CACHED_MEM,
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pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].alignment)
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!= AGTIAPI_SUCCESS ) {
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return AGTIAPI_FAIL;
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}
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//AGTIAPI_INIT("agtiapi_InitResource: LoMem %d cacheIndex=%d CACHED "
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// "vaddr %p / %p, length %d align %d\n",
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// numVal, pCardInfo->cacheIndex,
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// pCardInfo->tiCachedMem[pCardInfo->cacheIndex],
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// pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].virtPtr,
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// pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].totalLength,
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// pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].alignment);
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thisCardInst->cacheIndex++;
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}
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else if ( ((pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].type
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& (BIT(0) | BIT(1))) == TI_DMA_MEM_CHIP)) {
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// not expecting this case, print warning that should get attention
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printf( "RED ALARM: we need a BAR for TI_DMA_MEM_CHIP, ignoring!" );
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}
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else {
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printf( "agtiapi_InitResource: Unknown required memory type %d "
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"ERROR!\n",
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pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].type);
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return AGTIAPI_FAIL;
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}
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}
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}
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// end: TI data structure resources ...
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// begin: tiInitiatorResource
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if ( pmsc->flags & AGTIAPI_INITIATOR ) {
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if ( pRscInfo->tiInitiatorResource.initiatorMem.count != 0 ) {
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//AGTIAPI_INIT("agtiapi_InitResource: initiatorMem count = %d\n",
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// pRscInfo->tiInitiatorResource.initiatorMem.count);
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numVal =
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(U32)( pRscInfo->tiInitiatorResource.initiatorOption.usecsPerTick
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/ uSecPerTick );
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if( pRscInfo->tiInitiatorResource.initiatorOption.usecsPerTick
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% uSecPerTick > 0 )
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pRscInfo->tiInitiatorResource.initiatorOption.usecsPerTick =
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(numVal + 1) * uSecPerTick;
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else
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pRscInfo->tiInitiatorResource.initiatorOption.usecsPerTick =
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numVal * uSecPerTick;
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for ( numVal = 0;
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numVal < pRscInfo->tiInitiatorResource.initiatorMem.count;
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numVal++ ) {
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// check for 64 bit alignment
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if( pRscInfo->tiInitiatorResource.initiatorMem.tdCachedMem[numVal].
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alignment < AGTIAPI_64BIT_ALIGN ) {
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pRscInfo->tiInitiatorResource.initiatorMem.tdCachedMem[numVal].
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alignment = AGTIAPI_64BIT_ALIGN;
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}
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if( thisCardInst->cacheIndex >=
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sizeof( thisCardInst->tiCachedMem) /
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sizeof( thisCardInst->tiCachedMem[0])) {
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AGTIAPI_PRINTK( "Invalid cacheIndex %d ERROR\n",
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thisCardInst->cacheIndex );
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return AGTIAPI_FAIL;
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}
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// initiator memory is cached, no check is needed
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if( agtiapi_MemAlloc( thisCardInst,
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(void *)&thisCardInst->tiCachedMem[thisCardInst->cacheIndex],
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(vm_paddr_t *)agNULL,
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&pRscInfo->tiInitiatorResource.initiatorMem.
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tdCachedMem[numVal].virtPtr,
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(U32 *)agNULL,
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(U32 *)agNULL,
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pRscInfo->tiInitiatorResource.initiatorMem.tdCachedMem[numVal].
|
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totalLength,
|
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TI_CACHED_MEM,
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pRscInfo->tiInitiatorResource.initiatorMem.tdCachedMem[numVal].
|
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alignment)
|
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!= AGTIAPI_SUCCESS) {
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return AGTIAPI_FAIL;
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}
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// AGTIAPI_INIT("agtiapi_InitResource: IniMem %d cacheIndex=%d CACHED "
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// "vaddr %p / %p, length %d align 0x%x\n",
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// numVal,
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// pCardInfo->cacheIndex,
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// pCardInfo->tiCachedMem[pCardInfo->cacheIndex],
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// pRscInfo->tiInitiatorResource.initiatorMem.tdCachedMem[numVal].
|
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// virtPtr,
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//pRscInfo->tiInitiatorResource.initiatorMem.tdCachedMem[numVal].
|
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// totalLength,
|
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// pRscInfo->tiInitiatorResource.initiatorMem.tdCachedMem[numVal].
|
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// alignment);
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thisCardInst->cacheIndex++;
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}
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}
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}
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// end: tiInitiatorResource
|
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|
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// begin: tiTdSharedMem
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if (pRscInfo->tiSharedMem.tdSharedCachedMem1.totalLength != 0) {
|
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// check for 64 bit alignment
|
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if( pRscInfo->tiSharedMem.tdSharedCachedMem1.alignment <
|
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AGTIAPI_64BIT_ALIGN ) {
|
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pRscInfo->tiSharedMem.tdSharedCachedMem1.alignment = AGTIAPI_64BIT_ALIGN;
|
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}
|
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if( (pRscInfo->tiSharedMem.tdSharedCachedMem1.type & (BIT(0) | BIT(1)))
|
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== TI_DMA_MEM ) {
|
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if( thisCardInst->dmaIndex >=
|
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sizeof(thisCardInst->tiDmaMem) / sizeof(thisCardInst->tiDmaMem[0]) ) {
|
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AGTIAPI_PRINTK( "Invalid dmaIndex %d ERROR\n", thisCardInst->dmaIndex);
|
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return AGTIAPI_FAIL;
|
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}
|
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if( agtiapi_MemAlloc( thisCardInst, (void *)&thisCardInst->
|
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tiDmaMem[thisCardInst->dmaIndex].dmaVirtAddr,
|
|
&thisCardInst->tiDmaMem[thisCardInst->dmaIndex].
|
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dmaPhysAddr,
|
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&pRscInfo->tiSharedMem.tdSharedCachedMem1.virtPtr,
|
|
&pRscInfo->tiSharedMem.tdSharedCachedMem1.
|
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physAddrUpper,
|
|
&pRscInfo->tiSharedMem.tdSharedCachedMem1.
|
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physAddrLower,
|
|
pRscInfo->tiSharedMem.tdSharedCachedMem1.
|
|
totalLength,
|
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TI_DMA_MEM,
|
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pRscInfo->tiSharedMem.tdSharedCachedMem1.alignment)
|
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!= AGTIAPI_SUCCESS )
|
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return AGTIAPI_FAIL;
|
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|
|
thisCardInst->tiDmaMem[thisCardInst->dmaIndex].memSize =
|
|
pRscInfo->tiSharedMem.tdSharedCachedMem1.totalLength +
|
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pRscInfo->tiSharedMem.tdSharedCachedMem1.alignment;
|
|
// printf( "agtiapi_InitResource: SharedMem DmaIndex=%d DMA "
|
|
// "virt %p / %p, phys 0x%x, align %d\n",
|
|
// thisCardInst->dmaIndex,
|
|
// thisCardInst->tiDmaMem[thisCardInst->dmaIndex].dmaVirtAddr,
|
|
// pRscInfo->tiSharedMem.tdSharedCachedMem1.virtPtr,
|
|
// pRscInfo->tiSharedMem.tdSharedCachedMem1.physAddrLower,
|
|
// pRscInfo->tiSharedMem.tdSharedCachedMem1.alignment);
|
|
thisCardInst->dmaIndex++;
|
|
}
|
|
else if( (pRscInfo->tiSharedMem.tdSharedCachedMem1.type &
|
|
(BIT(0) | BIT(1)))
|
|
== TI_CACHED_MEM ) {
|
|
if( thisCardInst->cacheIndex >=
|
|
sizeof(thisCardInst->tiCachedMem) /
|
|
sizeof(thisCardInst->tiCachedMem[0]) ) {
|
|
AGTIAPI_PRINTK( "Invalid cacheIndex %d ERROR\n", thisCardInst->cacheIndex);
|
|
return AGTIAPI_FAIL;
|
|
}
|
|
if( agtiapi_MemAlloc( thisCardInst, (void *)&thisCardInst->
|
|
tiCachedMem[thisCardInst->cacheIndex],
|
|
(vm_paddr_t *)agNULL,
|
|
&pRscInfo->tiSharedMem.tdSharedCachedMem1.virtPtr,
|
|
(U32 *)agNULL,
|
|
(U32 *)agNULL,
|
|
pRscInfo->
|
|
tiSharedMem.tdSharedCachedMem1.totalLength,
|
|
TI_CACHED_MEM,
|
|
pRscInfo->tiSharedMem.tdSharedCachedMem1.alignment)
|
|
!= AGTIAPI_SUCCESS )
|
|
return AGTIAPI_FAIL;
|
|
// printf( "agtiapi_InitResource: SharedMem cacheIndex=%d CACHED "
|
|
// "vaddr %p / %p, length %d align 0x%x\n",
|
|
// thisCardInst->cacheIndex,
|
|
// thisCardInst->tiCachedMem[thisCardInst->cacheIndex],
|
|
// pRscInfo->tiSharedMem.tdSharedCachedMem1.virtPtr,
|
|
// pRscInfo->tiSharedMem.tdSharedCachedMem1.totalLength,
|
|
// pRscInfo->tiSharedMem.tdSharedCachedMem1.alignment);
|
|
AGTIAPI_PRINTK( "agtiapi_InitResource: SharedMem cacheIndex=%d CACHED "
|
|
"vaddr %p / %p, length %d align 0x%x\n",
|
|
thisCardInst->cacheIndex,
|
|
thisCardInst->tiCachedMem[thisCardInst->cacheIndex],
|
|
pRscInfo->tiSharedMem.tdSharedCachedMem1.virtPtr,
|
|
pRscInfo->tiSharedMem.tdSharedCachedMem1.totalLength,
|
|
pRscInfo->tiSharedMem.tdSharedCachedMem1.alignment );
|
|
thisCardInst->cacheIndex++;
|
|
}
|
|
else {
|
|
AGTIAPI_PRINTK( "agtiapi_InitResource: "
|
|
"Unknown required memory type ERROR!\n" );
|
|
return AGTIAPI_FAIL;
|
|
}
|
|
}
|
|
// end: tiTdSharedMem
|
|
DELAY( 200000 ); // or use AGTIAPI_INIT_MDELAY(200);
|
|
return AGTIAPI_SUCCESS;
|
|
} // agtiapi_InitResource() ends here
|
|
|
|
/******************************************************************************
|
|
agtiapi_ScopeDMARes()
|
|
Purpose:
|
|
Determine the amount of DMA (non-cache) memory resources which will be
|
|
required for a card ( and necessarily allocated in agtiapi_InitResource() )
|
|
Parameters:
|
|
ag_card_info_t *thisCardInst (IN)
|
|
Return:
|
|
size of DMA memory which call to agtiapi_InitResource() will consume
|
|
Note:
|
|
this funcion mirrors the flow of agtiapi_InitResource()
|
|
results are stored in agtiapi_softc fields
|
|
******************************************************************************/
|
|
STATIC int agtiapi_ScopeDMARes( ag_card_info_t *thisCardInst )
|
|
{
|
|
struct agtiapi_softc *pmsc = thisCardInst->pCard;
|
|
U32 lAllMem = 0; // total memory count; typhn
|
|
U32 lTmpAlign, lTmpType, lTmpLen;
|
|
|
|
// tiLoLevelResource
|
|
U32 numVal;
|
|
ag_resource_info_t *pRscInfo;
|
|
pRscInfo = &thisCardInst->tiRscInfo;
|
|
|
|
if (pRscInfo->tiLoLevelResource.loLevelMem.count != 0) {
|
|
for( numVal = 0; numVal < pRscInfo->tiLoLevelResource.loLevelMem.count;
|
|
numVal++ ) {
|
|
if( pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].totalLength ==
|
|
0 ) {
|
|
printf( "agtiapi_ScopeDMARes: skip ZERO %d\n", numVal );
|
|
continue;
|
|
}
|
|
// check for 64 bit alignment
|
|
lTmpAlign = pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].alignment;
|
|
if( lTmpAlign < AGTIAPI_64BIT_ALIGN ) {
|
|
AGTIAPI_PRINTK("agtiapi_ScopeDMARes: set ALIGN %d\n", numVal);
|
|
//pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].alignment =
|
|
lTmpAlign = AGTIAPI_64BIT_ALIGN;
|
|
}
|
|
if( ((pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].type
|
|
& (BIT(0) | BIT(1))) == TI_DMA_MEM) ||
|
|
((pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].type
|
|
& (BIT(0) | BIT(1))) == TI_CACHED_DMA_MEM)) {
|
|
//thisCardInst->tiDmaMem[thisCardInst->dmaIndex].type =
|
|
lTmpType =
|
|
#ifdef CACHED_DMA
|
|
pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].type
|
|
& (BIT(0) | BIT(1));
|
|
#else
|
|
TI_DMA_MEM;
|
|
#endif
|
|
if( lTmpType == TI_DMA_MEM ) {
|
|
lTmpLen =
|
|
pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].totalLength;
|
|
lAllMem += lTmpLen + lTmpAlign;
|
|
}
|
|
//printf( "agtiapi_ScopeDMARes: call 1 0x%x\n", lAllMem );
|
|
}
|
|
else if ( ( pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].type &
|
|
(BIT(0) | BIT(1)) ) == TI_CACHED_MEM ) {
|
|
// these are not the droids we're looking for
|
|
if( thisCardInst->cacheIndex >=
|
|
sizeof(thisCardInst->tiCachedMem) /
|
|
sizeof(thisCardInst->tiCachedMem[0]) ) {
|
|
AGTIAPI_PRINTK( "agtiapi_ScopeDMARes: Invalid cacheIndex %d ERROR\n",
|
|
thisCardInst->cacheIndex );
|
|
return lAllMem;
|
|
}
|
|
}
|
|
else {
|
|
printf( "agtiapi_ScopeDMARes: Unknown required memory type %d "
|
|
"ERROR!\n",
|
|
pRscInfo->tiLoLevelResource.loLevelMem.mem[numVal].type );
|
|
return lAllMem;
|
|
}
|
|
}
|
|
}
|
|
// end: TI data structure resources ...
|
|
|
|
// nothing for tiInitiatorResource
|
|
|
|
// begin: tiTdSharedMem
|
|
if (pRscInfo->tiSharedMem.tdSharedCachedMem1.totalLength != 0) {
|
|
// check for 64 bit alignment
|
|
lTmpAlign = pRscInfo->tiSharedMem.tdSharedCachedMem1.alignment;
|
|
if( lTmpAlign < AGTIAPI_64BIT_ALIGN ) {
|
|
//pRscInfo->tiSharedMem.tdSharedCachedMem1.alignment=AGTIAPI_64BIT_ALIGN;
|
|
lTmpAlign = AGTIAPI_64BIT_ALIGN;
|
|
}
|
|
if( (pRscInfo->tiSharedMem.tdSharedCachedMem1.type & (BIT(0) | BIT(1)))
|
|
== TI_DMA_MEM ) {
|
|
lTmpLen = pRscInfo->tiSharedMem.tdSharedCachedMem1.totalLength;
|
|
lAllMem += lTmpLen + lTmpAlign;
|
|
// printf( "agtiapi_ScopeDMARes: call 4D 0x%x\n", lAllMem );
|
|
}
|
|
else if( (pRscInfo->tiSharedMem.tdSharedCachedMem1.type &
|
|
(BIT(0) | BIT(1)))
|
|
!= TI_CACHED_MEM ) {
|
|
printf( "agtiapi_ScopeDMARes: Unknown required memory type ERROR!\n" );
|
|
}
|
|
}
|
|
// end: tiTdSharedMem
|
|
|
|
pmsc->typhn = lAllMem;
|
|
return lAllMem;
|
|
|
|
} // agtiapi_ScopeDMARes() ends here
|
|
|
|
|
|
STATIC void agtiapi_ReleasePCIMem( ag_card_info_t *pCardInfo ) {
|
|
U32 bar = 0;
|
|
int tmpRid = 0;
|
|
struct resource *tmpRsc = NULL;
|
|
device_t dev;
|
|
dev = pCardInfo->pPCIDev;
|
|
|
|
for (bar=0; bar < PCI_NUMBER_BARS; bar++) { // clean up PCI resource
|
|
tmpRid = pCardInfo->pciMemBaseRIDSpc[bar];
|
|
tmpRsc = pCardInfo->pciMemBaseRscSpc[bar];
|
|
if (tmpRsc != NULL) { // Release PCI resources
|
|
bus_release_resource( dev, SYS_RES_MEMORY, tmpRid, tmpRsc );
|
|
}
|
|
}
|
|
return;
|
|
}
|
|
|
|
|
|
/******************************************************************************
|
|
agtiapi_MemAlloc()
|
|
Purpose:
|
|
Handle various memory allocation requests.
|
|
Parameters:
|
|
ag_card_info_t *pCardInfo (IN) Pointer to card info structure
|
|
void **VirtAlloc (OUT) Allocated memory virtual address
|
|
dma_addr_t *pDmaAddr (OUT) Allocated dma memory physical address
|
|
void **VirtAddr (OUT) Aligned memory virtual address
|
|
U32 *pPhysAddrUp (OUT) Allocated memory physical upper 32 bits
|
|
U32 *pPhysAddrLow (OUT) Allocated memory physical lower 32 bits
|
|
U32 MemSize (IN) Allocated memory size
|
|
U32 Type (IN) Type of memory required
|
|
U32 Align (IN) Required memory alignment
|
|
Return:
|
|
AGTIAPI_SUCCESS - success
|
|
AGTIAPI_FAIL - fail
|
|
******************************************************************************/
|
|
STATIC agBOOLEAN agtiapi_MemAlloc( ag_card_info_t *thisCardInst,
|
|
void **VirtAlloc,
|
|
vm_paddr_t *pDmaAddr,
|
|
void **VirtAddr,
|
|
U32 *pPhysAddrUp,
|
|
U32 *pPhysAddrLow,
|
|
U32 MemSize,
|
|
U32 Type,
|
|
U32 Align )
|
|
{
|
|
U32_64 alignOffset = 0;
|
|
if( Align )
|
|
alignOffset = Align - 1;
|
|
|
|
// printf( "agtiapi_MemAlloc: debug find mem TYPE, %d vs. CACHE %d, DMA %d \n",
|
|
// ( Type & ( BIT(0) | BIT(1) ) ), TI_CACHED_MEM, TI_DMA_MEM );
|
|
|
|
if ((Type & (BIT(0) | BIT(1))) == TI_CACHED_MEM) {
|
|
*VirtAlloc = malloc( MemSize + Align, M_PMC_MMAL, M_ZERO | M_NOWAIT );
|
|
*VirtAddr = (void *)(((U32_64)*VirtAlloc + alignOffset) & ~alignOffset);
|
|
}
|
|
else {
|
|
struct agtiapi_softc *pmsc = thisCardInst->pCard; // get card reference
|
|
U32 residAlign = 0;
|
|
// find virt index value
|
|
*VirtAlloc = (void*)( (U64)pmsc->typh_mem + pmsc->typhIdx );
|
|
*VirtAddr = (void *)( ( (U32_64)*VirtAlloc + alignOffset) & ~alignOffset );
|
|
if( *VirtAddr != *VirtAlloc )
|
|
residAlign = (U64)*VirtAddr - (U64)*VirtAlloc; // find alignment needed
|
|
pmsc->typhIdx += residAlign + MemSize; // update index
|
|
residAlign = 0; // reset variable for reuse
|
|
// find phys index val
|
|
pDmaAddr = (vm_paddr_t*)( (U64)pmsc->typh_busaddr + pmsc->tyPhsIx );
|
|
vm_paddr_t *lPhysAligned =
|
|
(vm_paddr_t*)( ( (U64)pDmaAddr + alignOffset ) & ~alignOffset );
|
|
if( lPhysAligned != pDmaAddr )
|
|
residAlign = (U64)lPhysAligned - (U64)pDmaAddr; // find alignment needed
|
|
pmsc->tyPhsIx += residAlign + MemSize; // update index
|
|
*pPhysAddrUp = HIGH_32_BITS( (U64)lPhysAligned );
|
|
*pPhysAddrLow = LOW_32_BITS( (U64)lPhysAligned );
|
|
//printf( "agtiapi_MemAlloc: physIx 0x%x size 0x%x resid:0x%x "
|
|
// "addr:0x%p addrAligned:0x%p Align:0x%x\n",
|
|
// pmsc->tyPhsIx, MemSize, residAlign, pDmaAddr, lPhysAligned,
|
|
// Align );
|
|
}
|
|
if ( !*VirtAlloc ) {
|
|
AGTIAPI_PRINTK( "agtiapi_MemAlloc memory allocation ERROR x%x\n",
|
|
Type & (U32)(BIT(0) | BIT(1)));
|
|
return AGTIAPI_FAIL;
|
|
}
|
|
return AGTIAPI_SUCCESS;
|
|
}
|
|
|
|
|
|
/******************************************************************************
|
|
agtiapi_MemFree()
|
|
|
|
Purpose:
|
|
Free agtiapi_MemAlloc() allocated memory
|
|
Parameters:
|
|
ag_card_info_t *pCardInfo (IN) Pointer to card info structure
|
|
Return: none
|
|
******************************************************************************/
|
|
STATIC void agtiapi_MemFree( ag_card_info_t *pCardInfo )
|
|
{
|
|
U32 idx;
|
|
|
|
// release memory vs. alloc in agtiapi_MemAlloc; cached case
|
|
for( idx = 0; idx < pCardInfo->cacheIndex; idx++ ) {
|
|
if( pCardInfo->tiCachedMem[idx] ) {
|
|
free( pCardInfo->tiCachedMem[idx], M_PMC_MMAL );
|
|
AGTIAPI_PRINTK( "agtiapi_MemFree: TI_CACHED_MEM Mem[%d] %p\n",
|
|
idx, pCardInfo->tiCachedMem[idx] );
|
|
}
|
|
}
|
|
|
|
// release memory vs. alloc in agtiapi_typhAlloc; used in agtiapi_MemAlloc
|
|
struct agtiapi_softc *pmsc = pCardInfo->pCard; // get card reference
|
|
if( pmsc->typh_busaddr != 0 ) {
|
|
bus_dmamap_unload( pmsc->typh_dmat, pmsc->typh_mapp );
|
|
}
|
|
if( pmsc->typh_mem != NULL ) {
|
|
bus_dmamem_free( pmsc->typh_dmat, pmsc->typh_mem, pmsc->typh_mapp );
|
|
}
|
|
if( pmsc->typh_dmat != NULL ) {
|
|
bus_dma_tag_destroy( pmsc->typh_dmat );
|
|
}
|
|
//reference values:
|
|
// pCardInfo->dmaIndex
|
|
// pCardInfo->tiDmaMem[idx].dmaVirtAddr
|
|
// pCardInfo->tiDmaMem[idx].memSize
|
|
// pCardInfo->tiDmaMem[idx].type == TI_CACHED_DMA_MEM
|
|
// pCardInfo->tiDmaMem[idx].type == TI_DMA_MEM
|
|
|
|
/* This code is redundant. Commenting out for now to maintain a placekeeper.
|
|
Free actually takes place in agtiapi_ReleaseHBA as calls on osti_dmat. dm
|
|
// release possible lower layer dynamic memory
|
|
for( idx = 0; idx < AGTIAPI_DYNAMIC_MAX; idx++ ) {
|
|
if( pCardInfo->dynamicMem[idx].dmaVirtAddr != NULL ) {
|
|
printf( "agtiapi_MemFree: dynMem[%d] virtAddr"
|
|
" %p / %lx size: %d\n",
|
|
idx, pCardInfo->dynamicMem[idx].dmaVirtAddr,
|
|
(long unsigned int)pCardInfo->dynamicMem[idx].dmaPhysAddr,
|
|
pCardInfo->dynamicMem[idx].memSize );
|
|
if( pCardInfo->dynamicMem[idx].dmaPhysAddr )
|
|
some form of free call would go here (
|
|
pCardInfo->dynamicMem[idx].dmaVirtAddr,
|
|
pCardInfo->dynamicMem[idx].memSize, ... );
|
|
else
|
|
free case for cacheable memory would go here
|
|
}
|
|
}
|
|
*/
|
|
return;
|
|
}
|
|
|
|
/******************************************************************************
|
|
agtiapi_ProbeCard()
|
|
Purpose:
|
|
sets thisCardInst->cardIdIndex to structure variant consistent with card.
|
|
ag_card_type[idx].vendorId we already determined is PCI_VENDOR_ID_PMC_SIERRA.
|
|
Parameters:
|
|
device_t dev,
|
|
ag_card_info_t *thisCardInst,
|
|
int thisCard
|
|
Return:
|
|
0 - success
|
|
other values are not as good
|
|
Note:
|
|
This implementation is tailored to FreeBSD in alignment with the probe
|
|
functionality of the FreeBSD environment.
|
|
******************************************************************************/
|
|
STATIC int agtiapi_ProbeCard( device_t dev,
|
|
ag_card_info_t *thisCardInst,
|
|
int thisCard )
|
|
{
|
|
int idx;
|
|
u_int16_t agtiapi_vendor; // PCI vendor ID
|
|
u_int16_t agtiapi_dev; // PCI device ID
|
|
AGTIAPI_PRINTK("agtiapi_ProbeCard: start\n");
|
|
|
|
agtiapi_vendor = pci_get_vendor( dev ); // get PCI vendor ID
|
|
agtiapi_dev = pci_get_device( dev ); // get PCI device ID
|
|
for( idx = 0; idx < COUNT(ag_card_type); idx++ )
|
|
{
|
|
if ( ag_card_type[idx].deviceId == agtiapi_dev &&
|
|
ag_card_type[idx].vendorId == agtiapi_vendor)
|
|
{ // device ID match
|
|
memset( (void *)&agCardInfoList[ thisCard ], 0,
|
|
sizeof(ag_card_info_t) );
|
|
thisCardInst->cardIdIndex = idx;
|
|
thisCardInst->pPCIDev = dev;
|
|
thisCardInst->cardNameIndex = ag_card_type[idx].cardNameIndex;
|
|
thisCardInst->cardID =
|
|
pci_read_config( dev, ag_card_type[idx].membar, 4 ); // memAddr
|
|
AGTIAPI_PRINTK("agtiapi_ProbeCard: We've got PMC SAS, probe successful %p / %p\n",
|
|
thisCardInst->pPCIDev, thisCardInst );
|
|
device_set_desc( dev, ag_card_names[ag_card_type[idx].cardNameIndex] );
|
|
return 0;
|
|
}
|
|
}
|
|
return 1;
|
|
}
|
|
|