jchandra 4dbc8bbbad arm64 gicv3_its: enable all ITS blocks for a CPU ... We now support multiple ITS blocks raising interrupts to a CPU. Add all available CPUs to the ITS when no NUMA information is available. This reverts the check added in r340602, at that tim we did not suppport multiple ITS blocks for a CPU. Differential Revision: https://reviews.freebsd.org/D20417		2019-06-24 21:13:45 +00:00
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acpica	Merge ACPICA 20190329.	2019-03-29 20:21:28 +00:00
arm64	arm64 gicv3_its: enable all ITS blocks for a CPU	2019-06-24 21:13:45 +00:00
cavium	Rename the ThunderX CPU identification macros to include the X. This is the	2018-06-13 12:17:11 +00:00
cloudabi32	Remove sv_pagesize, originally introduced with r100384.	2019-03-01 16:16:38 +00:00
cloudabi64	Remove sv_pagesize, originally introduced with r100384.	2019-03-01 16:16:38 +00:00
conf	sys: Remove DEV_RANDOM device option	2019-06-21 00:16:30 +00:00
coresight	Extract eventfilter declarations to sys/_eventfilter.h	2019-05-20 00:38:23 +00:00
include	Lightly hide the 'var' inside the macros to read the arm special registers.	2019-06-15 00:47:39 +00:00
linux	makesyscalls.sh: always use absolute path for syscalls.conf	2019-05-30 20:56:23 +00:00
qualcomm	Enable Qualcomm Debug Subsystem (QDSS) block on MSM8916 SoC.	2018-04-10 12:53:48 +00:00
rockchip	A bit of code hygiene (no functional changes).	2019-06-10 23:25:40 +00:00