1149 lines
34 KiB
C
1149 lines
34 KiB
C
/**
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* \file drm.h
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* Header for the Direct Rendering Manager
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*
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* \author Rickard E. (Rik) Faith <faith@valinux.com>
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*
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* \par Acknowledgments:
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* Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
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*/
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/*-
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* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/**
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* \mainpage
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*
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* The Direct Rendering Manager (DRM) is a device-independent kernel-level
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* device driver that provides support for the XFree86 Direct Rendering
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* Infrastructure (DRI).
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*
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* The DRM supports the Direct Rendering Infrastructure (DRI) in four major
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* ways:
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* -# The DRM provides synchronized access to the graphics hardware via
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* the use of an optimized two-tiered lock.
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* -# The DRM enforces the DRI security policy for access to the graphics
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* hardware by only allowing authenticated X11 clients access to
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* restricted regions of memory.
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* -# The DRM provides a generic DMA engine, complete with multiple
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* queues and the ability to detect the need for an OpenGL context
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* switch.
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* -# The DRM is extensible via the use of small device-specific modules
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* that rely extensively on the API exported by the DRM module.
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*
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*/
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#ifndef _DRM_H_
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#define _DRM_H_
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#ifndef __user
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#define __user
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#endif
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#ifndef __iomem
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#define __iomem
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#endif
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#ifdef __GNUC__
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# define DEPRECATED __attribute__ ((deprecated))
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#else
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# define DEPRECATED
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#endif
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#if defined(__linux__)
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#include <asm/ioctl.h> /* For _IO* macros */
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#define DRM_IOCTL_NR(n) _IOC_NR(n)
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#define DRM_IOC_VOID _IOC_NONE
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#define DRM_IOC_READ _IOC_READ
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#define DRM_IOC_WRITE _IOC_WRITE
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#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE
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#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
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#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__)
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#include <sys/ioccom.h>
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#define DRM_IOCTL_NR(n) ((n) & 0xff)
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#define DRM_IOC_VOID IOC_VOID
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#define DRM_IOC_READ IOC_OUT
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#define DRM_IOC_WRITE IOC_IN
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#define DRM_IOC_READWRITE IOC_INOUT
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#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
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#endif
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#ifdef __OpenBSD__
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#define DRM_MAJOR 81
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#endif
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#if defined(__linux__) || defined(__NetBSD__)
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#define DRM_MAJOR 226
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#endif
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#define DRM_MAX_MINOR 15
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#define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */
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#define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */
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#define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */
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#define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */
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#define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */
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#define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */
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#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
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#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
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#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
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#if defined(__linux__)
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typedef unsigned int drm_handle_t;
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#else
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#include <sys/types.h>
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typedef unsigned long drm_handle_t; /**< To mapped regions */
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#endif
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typedef unsigned int drm_context_t; /**< GLXContext handle */
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typedef unsigned int drm_drawable_t;
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typedef unsigned int drm_magic_t; /**< Magic for authentication */
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/**
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* Cliprect.
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*
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* \warning If you change this structure, make sure you change
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* XF86DRIClipRectRec in the server as well
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*
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* \note KW: Actually it's illegal to change either for
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* backwards-compatibility reasons.
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*/
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struct drm_clip_rect {
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unsigned short x1;
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unsigned short y1;
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unsigned short x2;
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unsigned short y2;
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};
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/**
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* Texture region,
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*/
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struct drm_tex_region {
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unsigned char next;
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unsigned char prev;
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unsigned char in_use;
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unsigned char padding;
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unsigned int age;
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};
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/**
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* Hardware lock.
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*
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* The lock structure is a simple cache-line aligned integer. To avoid
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* processor bus contention on a multiprocessor system, there should not be any
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* other data stored in the same cache line.
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*/
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struct drm_hw_lock {
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__volatile__ unsigned int lock; /**< lock variable */
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char padding[60]; /**< Pad to cache line */
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};
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/* This is beyond ugly, and only works on GCC. However, it allows me to use
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* drm.h in places (i.e., in the X-server) where I can't use size_t. The real
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* fix is to use uint32_t instead of size_t, but that fix will break existing
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* LP64 (i.e., PowerPC64, SPARC64, Alpha, etc.) systems. That *will*
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* eventually happen, though. I chose 'unsigned long' to be the fallback type
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* because that works on all the platforms I know about. Hopefully, the
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* real fix will happen before that bites us.
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*/
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#ifdef __SIZE_TYPE__
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# define DRM_SIZE_T __SIZE_TYPE__
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#else
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# warning "__SIZE_TYPE__ not defined. Assuming sizeof(size_t) == sizeof(unsigned long)!"
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# define DRM_SIZE_T unsigned long
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#endif
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/**
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* DRM_IOCTL_VERSION ioctl argument type.
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*
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* \sa drmGetVersion().
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*/
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struct drm_version {
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int version_major; /**< Major version */
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int version_minor; /**< Minor version */
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int version_patchlevel; /**< Patch level */
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DRM_SIZE_T name_len; /**< Length of name buffer */
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char __user *name; /**< Name of driver */
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DRM_SIZE_T date_len; /**< Length of date buffer */
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char __user *date; /**< User-space buffer to hold date */
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DRM_SIZE_T desc_len; /**< Length of desc buffer */
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char __user *desc; /**< User-space buffer to hold desc */
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};
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/**
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* DRM_IOCTL_GET_UNIQUE ioctl argument type.
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*
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* \sa drmGetBusid() and drmSetBusId().
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*/
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struct drm_unique {
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DRM_SIZE_T unique_len; /**< Length of unique */
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char __user *unique; /**< Unique name for driver instantiation */
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};
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#undef DRM_SIZE_T
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struct drm_list {
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int count; /**< Length of user-space structures */
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struct drm_version __user *version;
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};
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struct drm_block {
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int unused;
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};
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/**
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* DRM_IOCTL_CONTROL ioctl argument type.
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*
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* \sa drmCtlInstHandler() and drmCtlUninstHandler().
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*/
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struct drm_control {
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enum {
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DRM_ADD_COMMAND,
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DRM_RM_COMMAND,
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DRM_INST_HANDLER,
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DRM_UNINST_HANDLER
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} func;
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int irq;
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};
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/**
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* Type of memory to map.
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*/
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enum drm_map_type {
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_DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
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_DRM_REGISTERS = 1, /**< no caching, no core dump */
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_DRM_SHM = 2, /**< shared, cached */
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_DRM_AGP = 3, /**< AGP/GART */
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_DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
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_DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */
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_DRM_TTM = 6
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};
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/**
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* Memory mapping flags.
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*/
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enum drm_map_flags {
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_DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
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_DRM_READ_ONLY = 0x02,
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_DRM_LOCKED = 0x04, /**< shared, cached, locked */
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_DRM_KERNEL = 0x08, /**< kernel requires access */
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_DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
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_DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
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_DRM_REMOVABLE = 0x40, /**< Removable mapping */
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_DRM_DRIVER = 0x80 /**< Managed by driver */
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};
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struct drm_ctx_priv_map {
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unsigned int ctx_id; /**< Context requesting private mapping */
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void *handle; /**< Handle of map */
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};
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/**
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* DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
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* argument type.
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*
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* \sa drmAddMap().
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*/
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struct drm_map {
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unsigned long offset; /**< Requested physical address (0 for SAREA)*/
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unsigned long size; /**< Requested physical size (bytes) */
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enum drm_map_type type; /**< Type of memory to map */
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enum drm_map_flags flags; /**< Flags */
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void *handle; /**< User-space: "Handle" to pass to mmap() */
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/**< Kernel-space: kernel-virtual address */
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int mtrr; /**< MTRR slot used */
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/* Private data */
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};
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/**
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* DRM_IOCTL_GET_CLIENT ioctl argument type.
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*/
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struct drm_client {
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int idx; /**< Which client desired? */
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int auth; /**< Is client authenticated? */
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unsigned long pid; /**< Process ID */
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unsigned long uid; /**< User ID */
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unsigned long magic; /**< Magic */
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unsigned long iocs; /**< Ioctl count */
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};
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enum drm_stat_type {
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_DRM_STAT_LOCK,
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_DRM_STAT_OPENS,
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_DRM_STAT_CLOSES,
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_DRM_STAT_IOCTLS,
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_DRM_STAT_LOCKS,
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_DRM_STAT_UNLOCKS,
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_DRM_STAT_VALUE, /**< Generic value */
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_DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
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_DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
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_DRM_STAT_IRQ, /**< IRQ */
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_DRM_STAT_PRIMARY, /**< Primary DMA bytes */
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_DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
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_DRM_STAT_DMA, /**< DMA */
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_DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
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_DRM_STAT_MISSED /**< Missed DMA opportunity */
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/* Add to the *END* of the list */
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};
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/**
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* DRM_IOCTL_GET_STATS ioctl argument type.
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*/
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struct drm_stats {
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unsigned long count;
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struct {
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unsigned long value;
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enum drm_stat_type type;
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} data[15];
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};
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/**
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* Hardware locking flags.
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*/
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enum drm_lock_flags {
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_DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
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_DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
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_DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
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_DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
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/* These *HALT* flags aren't supported yet
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-- they will be used to support the
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full-screen DGA-like mode. */
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_DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
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_DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
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};
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/**
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* DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
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*
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* \sa drmGetLock() and drmUnlock().
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*/
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struct drm_lock {
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int context;
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enum drm_lock_flags flags;
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};
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/**
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* DMA flags
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*
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* \warning
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* These values \e must match xf86drm.h.
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*
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* \sa drm_dma.
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*/
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enum drm_dma_flags {
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/* Flags for DMA buffer dispatch */
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_DRM_DMA_BLOCK = 0x01, /**<
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* Block until buffer dispatched.
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*
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* \note The buffer may not yet have
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* been processed by the hardware --
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* getting a hardware lock with the
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* hardware quiescent will ensure
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* that the buffer has been
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* processed.
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*/
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_DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
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_DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
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/* Flags for DMA buffer request */
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_DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
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_DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
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_DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
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};
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/**
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* DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
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*
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* \sa drmAddBufs().
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*/
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struct drm_buf_desc {
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int count; /**< Number of buffers of this size */
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int size; /**< Size in bytes */
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int low_mark; /**< Low water mark */
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int high_mark; /**< High water mark */
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enum {
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_DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
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_DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
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_DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */
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_DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */
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_DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
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} flags;
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unsigned long agp_start; /**<
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* Start address of where the AGP buffers are
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* in the AGP aperture
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*/
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};
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/**
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* DRM_IOCTL_INFO_BUFS ioctl argument type.
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*/
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struct drm_buf_info {
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int count; /**< Number of buffers described in list */
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struct drm_buf_desc __user *list; /**< List of buffer descriptions */
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};
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/**
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* DRM_IOCTL_FREE_BUFS ioctl argument type.
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*/
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struct drm_buf_free {
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int count;
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int __user *list;
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};
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/**
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* Buffer information
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*
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* \sa drm_buf_map.
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*/
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struct drm_buf_pub {
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int idx; /**< Index into the master buffer list */
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int total; /**< Buffer size */
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int used; /**< Amount of buffer in use (for DMA) */
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void __user *address; /**< Address of buffer */
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};
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/**
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* DRM_IOCTL_MAP_BUFS ioctl argument type.
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*/
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struct drm_buf_map {
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int count; /**< Length of the buffer list */
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#if defined(__cplusplus)
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void __user *c_virtual;
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#else
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void __user *virtual; /**< Mmap'd area in user-virtual */
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#endif
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struct drm_buf_pub __user *list; /**< Buffer information */
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};
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/**
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* DRM_IOCTL_DMA ioctl argument type.
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*
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* Indices here refer to the offset into the buffer list in drm_buf_get.
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*
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* \sa drmDMA().
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*/
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struct drm_dma {
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int context; /**< Context handle */
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int send_count; /**< Number of buffers to send */
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int __user *send_indices; /**< List of handles to buffers */
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int __user *send_sizes; /**< Lengths of data to send */
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enum drm_dma_flags flags; /**< Flags */
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int request_count; /**< Number of buffers requested */
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int request_size; /**< Desired size for buffers */
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int __user *request_indices; /**< Buffer information */
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int __user *request_sizes;
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int granted_count; /**< Number of buffers granted */
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};
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enum drm_ctx_flags {
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_DRM_CONTEXT_PRESERVED = 0x01,
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_DRM_CONTEXT_2DONLY = 0x02
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};
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/**
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* DRM_IOCTL_ADD_CTX ioctl argument type.
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*
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* \sa drmCreateContext() and drmDestroyContext().
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*/
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struct drm_ctx {
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drm_context_t handle;
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enum drm_ctx_flags flags;
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};
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/**
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* DRM_IOCTL_RES_CTX ioctl argument type.
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*/
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struct drm_ctx_res {
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int count;
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struct drm_ctx __user *contexts;
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};
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/**
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* DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
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*/
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struct drm_draw {
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drm_drawable_t handle;
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};
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/**
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* DRM_IOCTL_UPDATE_DRAW ioctl argument type.
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*/
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typedef enum {
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DRM_DRAWABLE_CLIPRECTS,
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} drm_drawable_info_type_t;
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struct drm_update_draw {
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drm_drawable_t handle;
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unsigned int type;
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unsigned int num;
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unsigned long long data;
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};
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/**
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* DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
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*/
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struct drm_auth {
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drm_magic_t magic;
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};
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/**
|
|
* DRM_IOCTL_IRQ_BUSID ioctl argument type.
|
|
*
|
|
* \sa drmGetInterruptFromBusID().
|
|
*/
|
|
struct drm_irq_busid {
|
|
int irq; /**< IRQ number */
|
|
int busnum; /**< bus number */
|
|
int devnum; /**< device number */
|
|
int funcnum; /**< function number */
|
|
};
|
|
|
|
enum drm_vblank_seq_type {
|
|
_DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
|
|
_DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
|
|
_DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
|
|
_DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
|
|
_DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
|
|
_DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */
|
|
};
|
|
|
|
#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
|
|
#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_SIGNAL | _DRM_VBLANK_SECONDARY | \
|
|
_DRM_VBLANK_NEXTONMISS)
|
|
|
|
struct drm_wait_vblank_request {
|
|
enum drm_vblank_seq_type type;
|
|
unsigned int sequence;
|
|
unsigned long signal;
|
|
};
|
|
|
|
struct drm_wait_vblank_reply {
|
|
enum drm_vblank_seq_type type;
|
|
unsigned int sequence;
|
|
long tval_sec;
|
|
long tval_usec;
|
|
};
|
|
|
|
/**
|
|
* DRM_IOCTL_WAIT_VBLANK ioctl argument type.
|
|
*
|
|
* \sa drmWaitVBlank().
|
|
*/
|
|
union drm_wait_vblank {
|
|
struct drm_wait_vblank_request request;
|
|
struct drm_wait_vblank_reply reply;
|
|
};
|
|
|
|
|
|
#define _DRM_PRE_MODESET 1
|
|
#define _DRM_POST_MODESET 2
|
|
|
|
/**
|
|
* DRM_IOCTL_MODESET_CTL ioctl argument type
|
|
*
|
|
* \sa drmModesetCtl().
|
|
*/
|
|
struct drm_modeset_ctl {
|
|
uint32_t crtc;
|
|
uint32_t cmd;
|
|
};
|
|
|
|
/**
|
|
* DRM_IOCTL_AGP_ENABLE ioctl argument type.
|
|
*
|
|
* \sa drmAgpEnable().
|
|
*/
|
|
struct drm_agp_mode {
|
|
unsigned long mode; /**< AGP mode */
|
|
};
|
|
|
|
/**
|
|
* DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
|
|
*
|
|
* \sa drmAgpAlloc() and drmAgpFree().
|
|
*/
|
|
struct drm_agp_buffer {
|
|
unsigned long size; /**< In bytes -- will round to page boundary */
|
|
unsigned long handle; /**< Used for binding / unbinding */
|
|
unsigned long type; /**< Type of memory to allocate */
|
|
unsigned long physical; /**< Physical used by i810 */
|
|
};
|
|
|
|
/**
|
|
* DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
|
|
*
|
|
* \sa drmAgpBind() and drmAgpUnbind().
|
|
*/
|
|
struct drm_agp_binding {
|
|
unsigned long handle; /**< From drm_agp_buffer */
|
|
unsigned long offset; /**< In bytes -- will round to page boundary */
|
|
};
|
|
|
|
/**
|
|
* DRM_IOCTL_AGP_INFO ioctl argument type.
|
|
*
|
|
* \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
|
|
* drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
|
|
* drmAgpVendorId() and drmAgpDeviceId().
|
|
*/
|
|
struct drm_agp_info {
|
|
int agp_version_major;
|
|
int agp_version_minor;
|
|
unsigned long mode;
|
|
unsigned long aperture_base; /**< physical address */
|
|
unsigned long aperture_size; /**< bytes */
|
|
unsigned long memory_allowed; /**< bytes */
|
|
unsigned long memory_used;
|
|
|
|
/** \name PCI information */
|
|
/*@{ */
|
|
unsigned short id_vendor;
|
|
unsigned short id_device;
|
|
/*@} */
|
|
};
|
|
|
|
/**
|
|
* DRM_IOCTL_SG_ALLOC ioctl argument type.
|
|
*/
|
|
struct drm_scatter_gather {
|
|
unsigned long size; /**< In bytes -- will round to page boundary */
|
|
unsigned long handle; /**< Used for mapping / unmapping */
|
|
};
|
|
|
|
/**
|
|
* DRM_IOCTL_SET_VERSION ioctl argument type.
|
|
*/
|
|
struct drm_set_version {
|
|
int drm_di_major;
|
|
int drm_di_minor;
|
|
int drm_dd_major;
|
|
int drm_dd_minor;
|
|
};
|
|
|
|
|
|
#define DRM_FENCE_FLAG_EMIT 0x00000001
|
|
#define DRM_FENCE_FLAG_SHAREABLE 0x00000002
|
|
/**
|
|
* On hardware with no interrupt events for operation completion,
|
|
* indicates that the kernel should sleep while waiting for any blocking
|
|
* operation to complete rather than spinning.
|
|
*
|
|
* Has no effect otherwise.
|
|
*/
|
|
#define DRM_FENCE_FLAG_WAIT_LAZY 0x00000004
|
|
#define DRM_FENCE_FLAG_NO_USER 0x00000010
|
|
|
|
/* Reserved for driver use */
|
|
#define DRM_FENCE_MASK_DRIVER 0xFF000000
|
|
|
|
#define DRM_FENCE_TYPE_EXE 0x00000001
|
|
|
|
struct drm_fence_arg {
|
|
unsigned int handle;
|
|
unsigned int fence_class;
|
|
unsigned int type;
|
|
unsigned int flags;
|
|
unsigned int signaled;
|
|
unsigned int error;
|
|
unsigned int sequence;
|
|
unsigned int pad64;
|
|
uint64_t expand_pad[2]; /*Future expansion */
|
|
};
|
|
|
|
/* Buffer permissions, referring to how the GPU uses the buffers.
|
|
* these translate to fence types used for the buffers.
|
|
* Typically a texture buffer is read, A destination buffer is write and
|
|
* a command (batch-) buffer is exe. Can be or-ed together.
|
|
*/
|
|
|
|
#define DRM_BO_FLAG_READ (1ULL << 0)
|
|
#define DRM_BO_FLAG_WRITE (1ULL << 1)
|
|
#define DRM_BO_FLAG_EXE (1ULL << 2)
|
|
|
|
/*
|
|
* All of the bits related to access mode
|
|
*/
|
|
#define DRM_BO_MASK_ACCESS (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_EXE)
|
|
/*
|
|
* Status flags. Can be read to determine the actual state of a buffer.
|
|
* Can also be set in the buffer mask before validation.
|
|
*/
|
|
|
|
/*
|
|
* Mask: Never evict this buffer. Not even with force. This type of buffer is only
|
|
* available to root and must be manually removed before buffer manager shutdown
|
|
* or lock.
|
|
* Flags: Acknowledge
|
|
*/
|
|
#define DRM_BO_FLAG_NO_EVICT (1ULL << 4)
|
|
|
|
/*
|
|
* Mask: Require that the buffer is placed in mappable memory when validated.
|
|
* If not set the buffer may or may not be in mappable memory when validated.
|
|
* Flags: If set, the buffer is in mappable memory.
|
|
*/
|
|
#define DRM_BO_FLAG_MAPPABLE (1ULL << 5)
|
|
|
|
/* Mask: The buffer should be shareable with other processes.
|
|
* Flags: The buffer is shareable with other processes.
|
|
*/
|
|
#define DRM_BO_FLAG_SHAREABLE (1ULL << 6)
|
|
|
|
/* Mask: If set, place the buffer in cache-coherent memory if available.
|
|
* If clear, never place the buffer in cache coherent memory if validated.
|
|
* Flags: The buffer is currently in cache-coherent memory.
|
|
*/
|
|
#define DRM_BO_FLAG_CACHED (1ULL << 7)
|
|
|
|
/* Mask: Make sure that every time this buffer is validated,
|
|
* it ends up on the same location provided that the memory mask is the same.
|
|
* The buffer will also not be evicted when claiming space for
|
|
* other buffers. Basically a pinned buffer but it may be thrown out as
|
|
* part of buffer manager shutdown or locking.
|
|
* Flags: Acknowledge.
|
|
*/
|
|
#define DRM_BO_FLAG_NO_MOVE (1ULL << 8)
|
|
|
|
/* Mask: Make sure the buffer is in cached memory when mapped. In conjunction
|
|
* with DRM_BO_FLAG_CACHED it also allows the buffer to be bound into the GART
|
|
* with unsnooped PTEs instead of snooped, by using chipset-specific cache
|
|
* flushing at bind time. A better name might be DRM_BO_FLAG_TT_UNSNOOPED,
|
|
* as the eviction to local memory (TTM unbind) on map is just a side effect
|
|
* to prevent aggressive cache prefetch from the GPU disturbing the cache
|
|
* management that the DRM is doing.
|
|
*
|
|
* Flags: Acknowledge.
|
|
* Buffers allocated with this flag should not be used for suballocators
|
|
* This type may have issues on CPUs with over-aggressive caching
|
|
* http://marc.info/?l=linux-kernel&m=102376926732464&w=2
|
|
*/
|
|
#define DRM_BO_FLAG_CACHED_MAPPED (1ULL << 19)
|
|
|
|
|
|
/* Mask: Force DRM_BO_FLAG_CACHED flag strictly also if it is set.
|
|
* Flags: Acknowledge.
|
|
*/
|
|
#define DRM_BO_FLAG_FORCE_CACHING (1ULL << 13)
|
|
|
|
/*
|
|
* Mask: Force DRM_BO_FLAG_MAPPABLE flag strictly also if it is clear.
|
|
* Flags: Acknowledge.
|
|
*/
|
|
#define DRM_BO_FLAG_FORCE_MAPPABLE (1ULL << 14)
|
|
#define DRM_BO_FLAG_TILE (1ULL << 15)
|
|
|
|
/*
|
|
* Memory type flags that can be or'ed together in the mask, but only
|
|
* one appears in flags.
|
|
*/
|
|
|
|
/* System memory */
|
|
#define DRM_BO_FLAG_MEM_LOCAL (1ULL << 24)
|
|
/* Translation table memory */
|
|
#define DRM_BO_FLAG_MEM_TT (1ULL << 25)
|
|
/* Vram memory */
|
|
#define DRM_BO_FLAG_MEM_VRAM (1ULL << 26)
|
|
/* Up to the driver to define. */
|
|
#define DRM_BO_FLAG_MEM_PRIV0 (1ULL << 27)
|
|
#define DRM_BO_FLAG_MEM_PRIV1 (1ULL << 28)
|
|
#define DRM_BO_FLAG_MEM_PRIV2 (1ULL << 29)
|
|
#define DRM_BO_FLAG_MEM_PRIV3 (1ULL << 30)
|
|
#define DRM_BO_FLAG_MEM_PRIV4 (1ULL << 31)
|
|
/* We can add more of these now with a 64-bit flag type */
|
|
|
|
/*
|
|
* This is a mask covering all of the memory type flags; easier to just
|
|
* use a single constant than a bunch of | values. It covers
|
|
* DRM_BO_FLAG_MEM_LOCAL through DRM_BO_FLAG_MEM_PRIV4
|
|
*/
|
|
#define DRM_BO_MASK_MEM 0x00000000FF000000ULL
|
|
/*
|
|
* This adds all of the CPU-mapping options in with the memory
|
|
* type to label all bits which change how the page gets mapped
|
|
*/
|
|
#define DRM_BO_MASK_MEMTYPE (DRM_BO_MASK_MEM | \
|
|
DRM_BO_FLAG_CACHED_MAPPED | \
|
|
DRM_BO_FLAG_CACHED | \
|
|
DRM_BO_FLAG_MAPPABLE)
|
|
|
|
/* Driver-private flags */
|
|
#define DRM_BO_MASK_DRIVER 0xFFFF000000000000ULL
|
|
|
|
/*
|
|
* Don't block on validate and map. Instead, return EBUSY.
|
|
*/
|
|
#define DRM_BO_HINT_DONT_BLOCK 0x00000002
|
|
/*
|
|
* Don't place this buffer on the unfenced list. This means
|
|
* that the buffer will not end up having a fence associated
|
|
* with it as a result of this operation
|
|
*/
|
|
#define DRM_BO_HINT_DONT_FENCE 0x00000004
|
|
/**
|
|
* On hardware with no interrupt events for operation completion,
|
|
* indicates that the kernel should sleep while waiting for any blocking
|
|
* operation to complete rather than spinning.
|
|
*
|
|
* Has no effect otherwise.
|
|
*/
|
|
#define DRM_BO_HINT_WAIT_LAZY 0x00000008
|
|
/*
|
|
* The client has compute relocations referring to this buffer using the
|
|
* offset in the presumed_offset field. If that offset ends up matching
|
|
* where this buffer lands, the kernel is free to skip executing those
|
|
* relocations
|
|
*/
|
|
#define DRM_BO_HINT_PRESUMED_OFFSET 0x00000010
|
|
|
|
#define DRM_BO_INIT_MAGIC 0xfe769812
|
|
#define DRM_BO_INIT_MAJOR 1
|
|
#define DRM_BO_INIT_MINOR 0
|
|
#define DRM_BO_INIT_PATCH 0
|
|
|
|
|
|
struct drm_bo_info_req {
|
|
uint64_t mask;
|
|
uint64_t flags;
|
|
unsigned int handle;
|
|
unsigned int hint;
|
|
unsigned int fence_class;
|
|
unsigned int desired_tile_stride;
|
|
unsigned int tile_info;
|
|
unsigned int pad64;
|
|
uint64_t presumed_offset;
|
|
};
|
|
|
|
struct drm_bo_create_req {
|
|
uint64_t flags;
|
|
uint64_t size;
|
|
uint64_t buffer_start;
|
|
unsigned int hint;
|
|
unsigned int page_alignment;
|
|
};
|
|
|
|
|
|
/*
|
|
* Reply flags
|
|
*/
|
|
|
|
#define DRM_BO_REP_BUSY 0x00000001
|
|
|
|
struct drm_bo_info_rep {
|
|
uint64_t flags;
|
|
uint64_t proposed_flags;
|
|
uint64_t size;
|
|
uint64_t offset;
|
|
uint64_t arg_handle;
|
|
uint64_t buffer_start;
|
|
unsigned int handle;
|
|
unsigned int fence_flags;
|
|
unsigned int rep_flags;
|
|
unsigned int page_alignment;
|
|
unsigned int desired_tile_stride;
|
|
unsigned int hw_tile_stride;
|
|
unsigned int tile_info;
|
|
unsigned int pad64;
|
|
uint64_t expand_pad[4]; /*Future expansion */
|
|
};
|
|
|
|
struct drm_bo_arg_rep {
|
|
struct drm_bo_info_rep bo_info;
|
|
int ret;
|
|
unsigned int pad64;
|
|
};
|
|
|
|
struct drm_bo_create_arg {
|
|
union {
|
|
struct drm_bo_create_req req;
|
|
struct drm_bo_info_rep rep;
|
|
} d;
|
|
};
|
|
|
|
struct drm_bo_handle_arg {
|
|
unsigned int handle;
|
|
};
|
|
|
|
struct drm_bo_reference_info_arg {
|
|
union {
|
|
struct drm_bo_handle_arg req;
|
|
struct drm_bo_info_rep rep;
|
|
} d;
|
|
};
|
|
|
|
struct drm_bo_map_wait_idle_arg {
|
|
union {
|
|
struct drm_bo_info_req req;
|
|
struct drm_bo_info_rep rep;
|
|
} d;
|
|
};
|
|
|
|
struct drm_bo_op_req {
|
|
enum {
|
|
drm_bo_validate,
|
|
drm_bo_fence,
|
|
drm_bo_ref_fence,
|
|
} op;
|
|
unsigned int arg_handle;
|
|
struct drm_bo_info_req bo_req;
|
|
};
|
|
|
|
|
|
struct drm_bo_op_arg {
|
|
uint64_t next;
|
|
union {
|
|
struct drm_bo_op_req req;
|
|
struct drm_bo_arg_rep rep;
|
|
} d;
|
|
int handled;
|
|
unsigned int pad64;
|
|
};
|
|
|
|
|
|
#define DRM_BO_MEM_LOCAL 0
|
|
#define DRM_BO_MEM_TT 1
|
|
#define DRM_BO_MEM_VRAM 2
|
|
#define DRM_BO_MEM_PRIV0 3
|
|
#define DRM_BO_MEM_PRIV1 4
|
|
#define DRM_BO_MEM_PRIV2 5
|
|
#define DRM_BO_MEM_PRIV3 6
|
|
#define DRM_BO_MEM_PRIV4 7
|
|
|
|
#define DRM_BO_MEM_TYPES 8 /* For now. */
|
|
|
|
#define DRM_BO_LOCK_UNLOCK_BM (1 << 0)
|
|
#define DRM_BO_LOCK_IGNORE_NO_EVICT (1 << 1)
|
|
|
|
struct drm_bo_version_arg {
|
|
uint32_t major;
|
|
uint32_t minor;
|
|
uint32_t patchlevel;
|
|
};
|
|
|
|
struct drm_mm_type_arg {
|
|
unsigned int mem_type;
|
|
unsigned int lock_flags;
|
|
};
|
|
|
|
struct drm_mm_init_arg {
|
|
unsigned int magic;
|
|
unsigned int major;
|
|
unsigned int minor;
|
|
unsigned int mem_type;
|
|
uint64_t p_offset;
|
|
uint64_t p_size;
|
|
};
|
|
|
|
struct drm_mm_info_arg {
|
|
unsigned int mem_type;
|
|
uint64_t p_size;
|
|
};
|
|
|
|
struct drm_gem_close {
|
|
/** Handle of the object to be closed. */
|
|
uint32_t handle;
|
|
uint32_t pad;
|
|
};
|
|
|
|
struct drm_gem_flink {
|
|
/** Handle for the object being named */
|
|
uint32_t handle;
|
|
|
|
/** Returned global name */
|
|
uint32_t name;
|
|
};
|
|
|
|
struct drm_gem_open {
|
|
/** Name of object being opened */
|
|
uint32_t name;
|
|
|
|
/** Returned handle for the object */
|
|
uint32_t handle;
|
|
|
|
/** Returned size of the object */
|
|
uint64_t size;
|
|
};
|
|
|
|
/**
|
|
* \name Ioctls Definitions
|
|
*/
|
|
/*@{*/
|
|
|
|
#define DRM_IOCTL_BASE 'd'
|
|
#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
|
|
#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
|
|
#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
|
|
#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
|
|
|
|
#define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version)
|
|
#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique)
|
|
#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth)
|
|
#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid)
|
|
#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)
|
|
#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
|
|
#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)
|
|
#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
|
|
#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
|
|
|
|
#define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
|
|
#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink)
|
|
#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open)
|
|
|
|
#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
|
|
#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
|
|
#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block)
|
|
#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block)
|
|
#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
|
|
#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map)
|
|
#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc)
|
|
#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
|
|
#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info)
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#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map)
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#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
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#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
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#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map)
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#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map)
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#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx)
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#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx)
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#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx)
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#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx)
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#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx)
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#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx)
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#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res)
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#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw)
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#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw)
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#define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma)
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#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock)
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#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock)
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#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock)
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#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
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#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
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#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode)
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#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info)
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#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer)
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#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer)
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#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding)
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#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding)
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#define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather)
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#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather)
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#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
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#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
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#define DRM_IOCTL_MM_INIT DRM_IOWR(0xc0, struct drm_mm_init_arg)
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#define DRM_IOCTL_MM_TAKEDOWN DRM_IOWR(0xc1, struct drm_mm_type_arg)
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#define DRM_IOCTL_MM_LOCK DRM_IOWR(0xc2, struct drm_mm_type_arg)
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#define DRM_IOCTL_MM_UNLOCK DRM_IOWR(0xc3, struct drm_mm_type_arg)
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#define DRM_IOCTL_FENCE_CREATE DRM_IOWR(0xc4, struct drm_fence_arg)
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#define DRM_IOCTL_FENCE_REFERENCE DRM_IOWR(0xc6, struct drm_fence_arg)
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#define DRM_IOCTL_FENCE_UNREFERENCE DRM_IOWR(0xc7, struct drm_fence_arg)
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#define DRM_IOCTL_FENCE_SIGNALED DRM_IOWR(0xc8, struct drm_fence_arg)
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#define DRM_IOCTL_FENCE_FLUSH DRM_IOWR(0xc9, struct drm_fence_arg)
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#define DRM_IOCTL_FENCE_WAIT DRM_IOWR(0xca, struct drm_fence_arg)
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#define DRM_IOCTL_FENCE_EMIT DRM_IOWR(0xcb, struct drm_fence_arg)
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#define DRM_IOCTL_FENCE_BUFFERS DRM_IOWR(0xcc, struct drm_fence_arg)
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#define DRM_IOCTL_BO_CREATE DRM_IOWR(0xcd, struct drm_bo_create_arg)
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#define DRM_IOCTL_BO_MAP DRM_IOWR(0xcf, struct drm_bo_map_wait_idle_arg)
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#define DRM_IOCTL_BO_UNMAP DRM_IOWR(0xd0, struct drm_bo_handle_arg)
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#define DRM_IOCTL_BO_REFERENCE DRM_IOWR(0xd1, struct drm_bo_reference_info_arg)
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#define DRM_IOCTL_BO_UNREFERENCE DRM_IOWR(0xd2, struct drm_bo_handle_arg)
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#define DRM_IOCTL_BO_SETSTATUS DRM_IOWR(0xd3, struct drm_bo_map_wait_idle_arg)
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#define DRM_IOCTL_BO_INFO DRM_IOWR(0xd4, struct drm_bo_reference_info_arg)
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#define DRM_IOCTL_BO_WAIT_IDLE DRM_IOWR(0xd5, struct drm_bo_map_wait_idle_arg)
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#define DRM_IOCTL_BO_VERSION DRM_IOR(0xd6, struct drm_bo_version_arg)
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#define DRM_IOCTL_MM_INFO DRM_IOWR(0xd7, struct drm_mm_info_arg)
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/*@}*/
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/**
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* Device specific ioctls should only be in their respective headers
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* The device specific ioctl range is from 0x40 to 0x99.
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* Generic IOCTLS restart at 0xA0.
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*
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* \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
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* drmCommandReadWrite().
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*/
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#define DRM_COMMAND_BASE 0x40
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#define DRM_COMMAND_END 0xA0
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/* typedef area */
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#ifndef __KERNEL__
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typedef struct drm_clip_rect drm_clip_rect_t;
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typedef struct drm_tex_region drm_tex_region_t;
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typedef struct drm_hw_lock drm_hw_lock_t;
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typedef struct drm_version drm_version_t;
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typedef struct drm_unique drm_unique_t;
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typedef struct drm_list drm_list_t;
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typedef struct drm_block drm_block_t;
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typedef struct drm_control drm_control_t;
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typedef enum drm_map_type drm_map_type_t;
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typedef enum drm_map_flags drm_map_flags_t;
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typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
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typedef struct drm_map drm_map_t;
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typedef struct drm_client drm_client_t;
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typedef enum drm_stat_type drm_stat_type_t;
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typedef struct drm_stats drm_stats_t;
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typedef enum drm_lock_flags drm_lock_flags_t;
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typedef struct drm_lock drm_lock_t;
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typedef enum drm_dma_flags drm_dma_flags_t;
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typedef struct drm_buf_desc drm_buf_desc_t;
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typedef struct drm_buf_info drm_buf_info_t;
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typedef struct drm_buf_free drm_buf_free_t;
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typedef struct drm_buf_pub drm_buf_pub_t;
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typedef struct drm_buf_map drm_buf_map_t;
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typedef struct drm_dma drm_dma_t;
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typedef union drm_wait_vblank drm_wait_vblank_t;
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typedef struct drm_agp_mode drm_agp_mode_t;
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typedef enum drm_ctx_flags drm_ctx_flags_t;
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typedef struct drm_ctx drm_ctx_t;
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typedef struct drm_ctx_res drm_ctx_res_t;
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typedef struct drm_draw drm_draw_t;
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typedef struct drm_update_draw drm_update_draw_t;
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typedef struct drm_auth drm_auth_t;
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typedef struct drm_irq_busid drm_irq_busid_t;
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typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
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typedef struct drm_agp_buffer drm_agp_buffer_t;
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typedef struct drm_agp_binding drm_agp_binding_t;
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typedef struct drm_agp_info drm_agp_info_t;
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typedef struct drm_scatter_gather drm_scatter_gather_t;
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typedef struct drm_set_version drm_set_version_t;
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|
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typedef struct drm_fence_arg drm_fence_arg_t;
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typedef struct drm_mm_type_arg drm_mm_type_arg_t;
|
|
typedef struct drm_mm_init_arg drm_mm_init_arg_t;
|
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typedef enum drm_bo_type drm_bo_type_t;
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#endif
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#endif
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