e285ef8d28
bhyve is intended to be a generic hypervisor, and not FreeBSD-specific. (renaming internal routines will come later) Reviewed by: neel Obtained from: NetApp
782 lines
18 KiB
C
782 lines
18 KiB
C
/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/linker_set.h>
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#include <sys/select.h>
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#include <sys/uio.h>
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#include <sys/ioctl.h>
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#include <errno.h>
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#include <fcntl.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <string.h>
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#include <strings.h>
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#include <unistd.h>
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#include <assert.h>
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#include <md5.h>
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#include <pthread.h>
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#include "bhyverun.h"
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#include "pci_emul.h"
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#include "mevent.h"
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#include "virtio.h"
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#define VTNET_RINGSZ 256
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#define VTNET_MAXSEGS 32
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/*
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* PCI config-space register offsets
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*/
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#define VTNET_R_CFG0 20
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#define VTNET_R_CFG1 21
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#define VTNET_R_CFG2 22
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#define VTNET_R_CFG3 23
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#define VTNET_R_CFG4 24
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#define VTNET_R_CFG5 25
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#define VTNET_R_CFG6 26
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#define VTNET_R_CFG7 27
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#define VTNET_R_MAX 27
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#define VTNET_REGSZ VTNET_R_MAX+1
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/*
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* Host capabilities
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*/
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#define VTNET_S_HOSTCAPS \
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( 0x00000020 | /* host supplies MAC */ \
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0x00008000 | /* host can merge Rx buffers */ \
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0x00010000 ) /* config status available */
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/*
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* Queue definitions.
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*/
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#define VTNET_RXQ 0
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#define VTNET_TXQ 1
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#define VTNET_CTLQ 2
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#define VTNET_MAXQ 3
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struct vring_hqueue {
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/* Internal state */
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uint16_t hq_size;
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uint16_t hq_cur_aidx; /* trails behind 'avail_idx' */
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/* Host-context pointers to the queue */
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struct virtio_desc *hq_dtable;
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uint16_t *hq_avail_flags;
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uint16_t *hq_avail_idx; /* monotonically increasing */
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uint16_t *hq_avail_ring;
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uint16_t *hq_used_flags;
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uint16_t *hq_used_idx; /* monotonically increasing */
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struct virtio_used *hq_used_ring;
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};
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/*
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* Fixed network header size
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*/
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struct virtio_net_rxhdr {
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uint8_t vrh_flags;
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uint8_t vrh_gso_type;
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uint16_t vrh_hdr_len;
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uint16_t vrh_gso_size;
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uint16_t vrh_csum_start;
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uint16_t vrh_csum_offset;
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uint16_t vrh_bufs;
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} __packed;
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/*
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* Debug printf
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*/
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static int pci_vtnet_debug;
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#define DPRINTF(params) if (pci_vtnet_debug) printf params
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#define WPRINTF(params) printf params
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/*
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* Per-device softc
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*/
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struct pci_vtnet_softc {
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struct pci_devinst *vsc_pi;
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pthread_mutex_t vsc_mtx;
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struct mevent *vsc_mevp;
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int vsc_curq;
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int vsc_status;
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int vsc_isr;
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int vsc_tapfd;
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int vsc_rx_ready;
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int vsc_rxpend;
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uint32_t vsc_features;
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uint8_t vsc_macaddr[6];
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uint64_t vsc_pfn[VTNET_MAXQ];
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struct vring_hqueue vsc_hq[VTNET_MAXQ];
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};
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/*
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* Return the number of available descriptors in the vring taking care
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* of the 16-bit index wraparound.
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*/
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static int
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hq_num_avail(struct vring_hqueue *hq)
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{
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int ndesc;
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if (*hq->hq_avail_idx >= hq->hq_cur_aidx)
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ndesc = *hq->hq_avail_idx - hq->hq_cur_aidx;
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else
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ndesc = UINT16_MAX - hq->hq_cur_aidx + *hq->hq_avail_idx + 1;
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assert(ndesc >= 0 && ndesc <= hq->hq_size);
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return (ndesc);
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}
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static uint16_t
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pci_vtnet_qsize(int qnum)
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{
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/* XXX no ctl queue currently */
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if (qnum == VTNET_CTLQ) {
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return (0);
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}
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/* XXX fixed currently. Maybe different for tx/rx/ctl */
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return (VTNET_RINGSZ);
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}
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static void
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pci_vtnet_ring_reset(struct pci_vtnet_softc *sc, int ring)
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{
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struct vring_hqueue *hq;
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assert(ring < VTNET_MAXQ);
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hq = &sc->vsc_hq[ring];
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/*
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* Reset all soft state
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*/
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hq->hq_cur_aidx = 0;
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}
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static void
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pci_vtnet_update_status(struct pci_vtnet_softc *sc, uint32_t value)
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{
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if (value == 0) {
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DPRINTF(("vtnet: device reset requested !\n"));
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pci_vtnet_ring_reset(sc, VTNET_RXQ);
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pci_vtnet_ring_reset(sc, VTNET_TXQ);
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sc->vsc_rx_ready = 0;
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}
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sc->vsc_status = value;
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}
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/*
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* Called to send a buffer chain out to the tap device
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*/
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static void
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pci_vtnet_tap_tx(struct pci_vtnet_softc *sc, struct iovec *iov, int iovcnt,
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int len)
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{
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char pad[60];
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if (sc->vsc_tapfd == -1)
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return;
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/*
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* If the length is < 60, pad out to that and add the
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* extra zero'd segment to the iov. It is guaranteed that
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* there is always an extra iov available by the caller.
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*/
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if (len < 60) {
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memset(pad, 0, 60 - len);
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iov[iovcnt].iov_base = pad;
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iov[iovcnt].iov_len = 60 - len;
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iovcnt++;
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}
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(void) writev(sc->vsc_tapfd, iov, iovcnt);
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}
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/*
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* Called when there is read activity on the tap file descriptor.
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* Each buffer posted by the guest is assumed to be able to contain
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* an entire ethernet frame + rx header.
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* MP note: the dummybuf is only used for discarding frames, so there
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* is no need for it to be per-vtnet or locked.
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*/
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static uint8_t dummybuf[2048];
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static void
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pci_vtnet_tap_rx(struct pci_vtnet_softc *sc)
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{
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struct virtio_desc *vd;
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struct virtio_used *vu;
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struct vring_hqueue *hq;
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struct virtio_net_rxhdr *vrx;
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uint8_t *buf;
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int i;
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int len;
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int ndescs;
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int didx, uidx, aidx; /* descriptor, avail and used index */
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/*
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* Should never be called without a valid tap fd
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*/
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assert(sc->vsc_tapfd != -1);
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/*
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* But, will be called when the rx ring hasn't yet
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* been set up.
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*/
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if (sc->vsc_rx_ready == 0) {
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/*
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* Drop the packet and try later.
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*/
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(void) read(sc->vsc_tapfd, dummybuf, sizeof(dummybuf));
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return;
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}
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/*
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* Calculate the number of available rx buffers
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*/
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hq = &sc->vsc_hq[VTNET_RXQ];
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ndescs = hq_num_avail(hq);
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if (ndescs == 0) {
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/*
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* Need to wait for host notification to read
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*/
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if (sc->vsc_rxpend == 0) {
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WPRINTF(("vtnet: no rx descriptors !\n"));
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sc->vsc_rxpend = 1;
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}
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/*
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* Drop the packet and try later
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*/
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(void) read(sc->vsc_tapfd, dummybuf, sizeof(dummybuf));
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return;
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}
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aidx = hq->hq_cur_aidx;
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uidx = *hq->hq_used_idx;
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for (i = 0; i < ndescs; i++) {
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/*
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* 'aidx' indexes into the an array of descriptor indexes
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*/
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didx = hq->hq_avail_ring[aidx % hq->hq_size];
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assert(didx >= 0 && didx < hq->hq_size);
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vd = &hq->hq_dtable[didx];
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/*
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* Get a pointer to the rx header, and use the
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* data immediately following it for the packet buffer.
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*/
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vrx = (struct virtio_net_rxhdr *)paddr_guest2host(vd->vd_addr);
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buf = (uint8_t *)(vrx + 1);
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len = read(sc->vsc_tapfd, buf,
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vd->vd_len - sizeof(struct virtio_net_rxhdr));
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if (len < 0 && errno == EWOULDBLOCK) {
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break;
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}
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/*
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* The only valid field in the rx packet header is the
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* number of buffers, which is always 1 without TSO
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* support.
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*/
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memset(vrx, 0, sizeof(struct virtio_net_rxhdr));
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vrx->vrh_bufs = 1;
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/*
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* Write this descriptor into the used ring
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*/
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vu = &hq->hq_used_ring[uidx % hq->hq_size];
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vu->vu_idx = didx;
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vu->vu_tlen = len + sizeof(struct virtio_net_rxhdr);
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uidx++;
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aidx++;
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}
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/*
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* Update the used pointer, and signal an interrupt if allowed
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*/
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*hq->hq_used_idx = uidx;
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hq->hq_cur_aidx = aidx;
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if ((*hq->hq_avail_flags & VRING_AVAIL_F_NO_INTERRUPT) == 0) {
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sc->vsc_isr |= 1;
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pci_generate_msi(sc->vsc_pi, 0);
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}
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}
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static void
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pci_vtnet_tap_callback(int fd, enum ev_type type, void *param)
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{
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struct pci_vtnet_softc *sc = param;
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pthread_mutex_lock(&sc->vsc_mtx);
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pci_vtnet_tap_rx(sc);
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pthread_mutex_unlock(&sc->vsc_mtx);
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}
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static void
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pci_vtnet_ping_rxq(struct pci_vtnet_softc *sc)
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{
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/*
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* A qnotify means that the rx process can now begin
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*/
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if (sc->vsc_rx_ready == 0) {
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sc->vsc_rx_ready = 1;
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}
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/*
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* If the rx queue was empty, attempt to receive a
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* packet that was previously blocked due to no rx bufs
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* available
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*/
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if (sc->vsc_rxpend) {
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WPRINTF(("vtnet: rx resumed\n\r"));
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sc->vsc_rxpend = 0;
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pci_vtnet_tap_rx(sc);
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}
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}
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static void
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pci_vtnet_proctx(struct pci_vtnet_softc *sc, struct vring_hqueue *hq)
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{
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struct iovec iov[VTNET_MAXSEGS + 1];
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struct virtio_desc *vd;
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struct virtio_used *vu;
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int i;
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int plen;
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int tlen;
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int uidx, aidx, didx;
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uidx = *hq->hq_used_idx;
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aidx = hq->hq_cur_aidx;
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didx = hq->hq_avail_ring[aidx % hq->hq_size];
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assert(didx >= 0 && didx < hq->hq_size);
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vd = &hq->hq_dtable[didx];
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/*
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* Run through the chain of descriptors, ignoring the
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* first header descriptor. However, include the header
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* length in the total length that will be put into the
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* used queue.
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*/
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tlen = vd->vd_len;
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vd = &hq->hq_dtable[vd->vd_next];
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for (i = 0, plen = 0;
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i < VTNET_MAXSEGS;
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i++, vd = &hq->hq_dtable[vd->vd_next]) {
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iov[i].iov_base = paddr_guest2host(vd->vd_addr);
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iov[i].iov_len = vd->vd_len;
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plen += vd->vd_len;
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tlen += vd->vd_len;
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if ((vd->vd_flags & VRING_DESC_F_NEXT) == 0)
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break;
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}
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assert(i < VTNET_MAXSEGS);
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DPRINTF(("virtio: packet send, %d bytes, %d segs\n\r", plen, i + 1));
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pci_vtnet_tap_tx(sc, iov, i + 1, plen);
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/*
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* Return this chain back to the host
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*/
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vu = &hq->hq_used_ring[uidx % hq->hq_size];
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vu->vu_idx = didx;
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vu->vu_tlen = tlen;
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hq->hq_cur_aidx = aidx + 1;
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*hq->hq_used_idx = uidx + 1;
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/*
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* Generate an interrupt if able
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*/
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if ((*hq->hq_avail_flags & VRING_AVAIL_F_NO_INTERRUPT) == 0) {
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sc->vsc_isr |= 1;
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pci_generate_msi(sc->vsc_pi, 0);
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}
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}
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static void
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pci_vtnet_ping_txq(struct pci_vtnet_softc *sc)
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{
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struct vring_hqueue *hq = &sc->vsc_hq[VTNET_TXQ];
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int i;
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int ndescs;
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/*
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* Calculate number of ring entries to process
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*/
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ndescs = hq_num_avail(hq);
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if (ndescs == 0)
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return;
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/*
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* Run through all the entries, placing them into iovecs and
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* sending when an end-of-packet is found
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*/
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for (i = 0; i < ndescs; i++)
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pci_vtnet_proctx(sc, hq);
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}
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static void
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pci_vtnet_ping_ctlq(struct pci_vtnet_softc *sc)
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{
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DPRINTF(("vtnet: control qnotify!\n\r"));
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}
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static void
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pci_vtnet_ring_init(struct pci_vtnet_softc *sc, uint64_t pfn)
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{
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struct vring_hqueue *hq;
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int qnum = sc->vsc_curq;
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assert(qnum < VTNET_MAXQ);
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sc->vsc_pfn[qnum] = pfn << VRING_PFN;
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/*
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* Set up host pointers to the various parts of the
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* queue
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*/
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hq = &sc->vsc_hq[qnum];
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hq->hq_size = pci_vtnet_qsize(qnum);
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hq->hq_dtable = paddr_guest2host(pfn << VRING_PFN);
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hq->hq_avail_flags = (uint16_t *)(hq->hq_dtable + hq->hq_size);
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hq->hq_avail_idx = hq->hq_avail_flags + 1;
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hq->hq_avail_ring = hq->hq_avail_flags + 2;
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hq->hq_used_flags = (uint16_t *)roundup2((uintptr_t)hq->hq_avail_ring,
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VRING_ALIGN);
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hq->hq_used_idx = hq->hq_used_flags + 1;
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hq->hq_used_ring = (struct virtio_used *)(hq->hq_used_flags + 2);
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/*
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* Initialize queue indexes
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*/
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hq->hq_cur_aidx = 0;
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}
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static int
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pci_vtnet_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
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{
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MD5_CTX mdctx;
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unsigned char digest[16];
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char nstr[80];
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struct pci_vtnet_softc *sc;
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/*
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* Access to guest memory is required. Fail if
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* memory not mapped
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*/
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if (paddr_guest2host(0) == NULL)
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return (1);
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sc = malloc(sizeof(struct pci_vtnet_softc));
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memset(sc, 0, sizeof(struct pci_vtnet_softc));
|
|
|
|
pi->pi_arg = sc;
|
|
sc->vsc_pi = pi;
|
|
|
|
pthread_mutex_init(&sc->vsc_mtx, NULL);
|
|
|
|
/*
|
|
* Attempt to open the tap device
|
|
*/
|
|
sc->vsc_tapfd = -1;
|
|
if (opts != NULL) {
|
|
char tbuf[80];
|
|
|
|
strcpy(tbuf, "/dev/");
|
|
strlcat(tbuf, opts, sizeof(tbuf));
|
|
|
|
sc->vsc_tapfd = open(tbuf, O_RDWR);
|
|
if (sc->vsc_tapfd == -1) {
|
|
WPRINTF(("open of tap device %s failed\n", tbuf));
|
|
} else {
|
|
/*
|
|
* Set non-blocking and register for read
|
|
* notifications with the event loop
|
|
*/
|
|
int opt = 1;
|
|
if (ioctl(sc->vsc_tapfd, FIONBIO, &opt) < 0) {
|
|
WPRINTF(("tap device O_NONBLOCK failed\n"));
|
|
close(sc->vsc_tapfd);
|
|
sc->vsc_tapfd = -1;
|
|
}
|
|
|
|
sc->vsc_mevp = mevent_add(sc->vsc_tapfd,
|
|
EVF_READ,
|
|
pci_vtnet_tap_callback,
|
|
sc);
|
|
if (sc->vsc_mevp == NULL) {
|
|
WPRINTF(("Could not register event\n"));
|
|
close(sc->vsc_tapfd);
|
|
sc->vsc_tapfd = -1;
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* The MAC address is the standard NetApp OUI of 00-a0-98,
|
|
* followed by an MD5 of the vm name. The slot/func number is
|
|
* prepended to this for slots other than 1:0, so that
|
|
* a bootloader can netboot from the equivalent of slot 1.
|
|
*/
|
|
if (pi->pi_slot == 1 && pi->pi_func == 0) {
|
|
strncpy(nstr, vmname, sizeof(nstr));
|
|
} else {
|
|
snprintf(nstr, sizeof(nstr), "%d-%d-%s", pi->pi_slot,
|
|
pi->pi_func, vmname);
|
|
}
|
|
|
|
MD5Init(&mdctx);
|
|
MD5Update(&mdctx, nstr, strlen(nstr));
|
|
MD5Final(digest, &mdctx);
|
|
|
|
sc->vsc_macaddr[0] = 0x00;
|
|
sc->vsc_macaddr[1] = 0xa0;
|
|
sc->vsc_macaddr[2] = 0x98;
|
|
sc->vsc_macaddr[3] = digest[0];
|
|
sc->vsc_macaddr[4] = digest[1];
|
|
sc->vsc_macaddr[5] = digest[2];
|
|
|
|
/* initialize config space */
|
|
pci_set_cfgdata16(pi, PCIR_DEVICE, VIRTIO_DEV_NET);
|
|
pci_set_cfgdata16(pi, PCIR_VENDOR, VIRTIO_VENDOR);
|
|
pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_NETWORK);
|
|
pci_set_cfgdata16(pi, PCIR_SUBDEV_0, VIRTIO_TYPE_NET);
|
|
pci_emul_add_msicap(pi, 1);
|
|
pci_emul_alloc_bar(pi, 0, PCIBAR_IO, VTNET_REGSZ);
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Function pointer array to handle queue notifications
|
|
*/
|
|
static void (*pci_vtnet_qnotify[VTNET_MAXQ])(struct pci_vtnet_softc *) = {
|
|
pci_vtnet_ping_rxq,
|
|
pci_vtnet_ping_txq,
|
|
pci_vtnet_ping_ctlq
|
|
};
|
|
|
|
static void
|
|
pci_vtnet_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
|
|
int baridx, uint64_t offset, int size, uint64_t value)
|
|
{
|
|
struct pci_vtnet_softc *sc = pi->pi_arg;
|
|
void *ptr;
|
|
|
|
assert(baridx == 0);
|
|
|
|
if (offset + size > VTNET_REGSZ) {
|
|
DPRINTF(("vtnet_write: 2big, offset %ld size %d\n",
|
|
offset, size));
|
|
return;
|
|
}
|
|
|
|
pthread_mutex_lock(&sc->vsc_mtx);
|
|
|
|
switch (offset) {
|
|
case VTCFG_R_GUESTCAP:
|
|
assert(size == 4);
|
|
sc->vsc_features = value & VTNET_S_HOSTCAPS;
|
|
break;
|
|
case VTCFG_R_PFN:
|
|
assert(size == 4);
|
|
pci_vtnet_ring_init(sc, value);
|
|
break;
|
|
case VTCFG_R_QSEL:
|
|
assert(size == 2);
|
|
assert(value < VTNET_MAXQ);
|
|
sc->vsc_curq = value;
|
|
break;
|
|
case VTCFG_R_QNOTIFY:
|
|
assert(size == 2);
|
|
assert(value < VTNET_MAXQ);
|
|
(*pci_vtnet_qnotify[value])(sc);
|
|
break;
|
|
case VTCFG_R_STATUS:
|
|
assert(size == 1);
|
|
pci_vtnet_update_status(sc, value);
|
|
break;
|
|
case VTNET_R_CFG0:
|
|
case VTNET_R_CFG1:
|
|
case VTNET_R_CFG2:
|
|
case VTNET_R_CFG3:
|
|
case VTNET_R_CFG4:
|
|
case VTNET_R_CFG5:
|
|
assert((size + offset) <= (VTNET_R_CFG5 + 1));
|
|
ptr = &sc->vsc_macaddr[offset - VTNET_R_CFG0];
|
|
/*
|
|
* The driver is allowed to change the MAC address
|
|
*/
|
|
sc->vsc_macaddr[offset - VTNET_R_CFG0] = value;
|
|
if (size == 1) {
|
|
*(uint8_t *) ptr = value;
|
|
} else if (size == 2) {
|
|
*(uint16_t *) ptr = value;
|
|
} else {
|
|
*(uint32_t *) ptr = value;
|
|
}
|
|
break;
|
|
case VTCFG_R_HOSTCAP:
|
|
case VTCFG_R_QNUM:
|
|
case VTCFG_R_ISR:
|
|
case VTNET_R_CFG6:
|
|
case VTNET_R_CFG7:
|
|
DPRINTF(("vtnet: write to readonly reg %ld\n\r", offset));
|
|
break;
|
|
default:
|
|
DPRINTF(("vtnet: unknown i/o write offset %ld\n\r", offset));
|
|
value = 0;
|
|
break;
|
|
}
|
|
|
|
pthread_mutex_unlock(&sc->vsc_mtx);
|
|
}
|
|
|
|
uint64_t
|
|
pci_vtnet_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
|
|
int baridx, uint64_t offset, int size)
|
|
{
|
|
struct pci_vtnet_softc *sc = pi->pi_arg;
|
|
void *ptr;
|
|
uint64_t value;
|
|
|
|
assert(baridx == 0);
|
|
|
|
if (offset + size > VTNET_REGSZ) {
|
|
DPRINTF(("vtnet_read: 2big, offset %ld size %d\n",
|
|
offset, size));
|
|
return (0);
|
|
}
|
|
|
|
pthread_mutex_lock(&sc->vsc_mtx);
|
|
|
|
switch (offset) {
|
|
case VTCFG_R_HOSTCAP:
|
|
assert(size == 4);
|
|
value = VTNET_S_HOSTCAPS;
|
|
break;
|
|
case VTCFG_R_GUESTCAP:
|
|
assert(size == 4);
|
|
value = sc->vsc_features; /* XXX never read ? */
|
|
break;
|
|
case VTCFG_R_PFN:
|
|
assert(size == 4);
|
|
value = sc->vsc_pfn[sc->vsc_curq] >> VRING_PFN;
|
|
break;
|
|
case VTCFG_R_QNUM:
|
|
assert(size == 2);
|
|
value = pci_vtnet_qsize(sc->vsc_curq);
|
|
break;
|
|
case VTCFG_R_QSEL:
|
|
assert(size == 2);
|
|
value = sc->vsc_curq; /* XXX never read ? */
|
|
break;
|
|
case VTCFG_R_QNOTIFY:
|
|
assert(size == 2);
|
|
value = sc->vsc_curq; /* XXX never read ? */
|
|
break;
|
|
case VTCFG_R_STATUS:
|
|
assert(size == 1);
|
|
value = sc->vsc_status;
|
|
break;
|
|
case VTCFG_R_ISR:
|
|
assert(size == 1);
|
|
value = sc->vsc_isr;
|
|
sc->vsc_isr = 0; /* a read clears this flag */
|
|
break;
|
|
case VTNET_R_CFG0:
|
|
case VTNET_R_CFG1:
|
|
case VTNET_R_CFG2:
|
|
case VTNET_R_CFG3:
|
|
case VTNET_R_CFG4:
|
|
case VTNET_R_CFG5:
|
|
assert((size + offset) <= (VTNET_R_CFG5 + 1));
|
|
ptr = &sc->vsc_macaddr[offset - VTNET_R_CFG0];
|
|
if (size == 1) {
|
|
value = *(uint8_t *) ptr;
|
|
} else if (size == 2) {
|
|
value = *(uint16_t *) ptr;
|
|
} else {
|
|
value = *(uint32_t *) ptr;
|
|
}
|
|
break;
|
|
case VTNET_R_CFG6:
|
|
assert(size != 4);
|
|
value = 0x01; /* XXX link always up */
|
|
break;
|
|
case VTNET_R_CFG7:
|
|
assert(size == 1);
|
|
value = 0; /* XXX link status in LSB */
|
|
break;
|
|
default:
|
|
DPRINTF(("vtnet: unknown i/o read offset %ld\n\r", offset));
|
|
value = 0;
|
|
break;
|
|
}
|
|
|
|
pthread_mutex_unlock(&sc->vsc_mtx);
|
|
|
|
return (value);
|
|
}
|
|
|
|
struct pci_devemu pci_de_vnet = {
|
|
.pe_emu = "virtio-net",
|
|
.pe_init = pci_vtnet_init,
|
|
.pe_barwrite = pci_vtnet_write,
|
|
.pe_barread = pci_vtnet_read
|
|
};
|
|
PCI_EMUL_SET(pci_de_vnet);
|