marius 51bdea6a39 The physical address space of cheetah-class CPUs has been extended ... to 43 bits so update TD_PA_BITS accordingly. For the most part this increase is transparent to the existing code except for when reading the physical address from ASI_{D,I}TLB_DATA_ACCESS_REG, which we only do in the loader and which was already adjusted in r182478, or from the OFW translations node. While at it, ensure we are only taking valid OFW mapping entries into account.		2008-09-04 19:43:14 +00:00
..
central	- Provide and consume module dependency information.	2008-08-23 16:07:20 +00:00
compile
conf	ahc(4) work better in Sparc64 with AHC_ALLOW_MEMIO.	2008-09-02 21:46:17 +00:00
ebus	- Removed unused sc_node.	2008-08-23 15:44:13 +00:00
fhc	- Provide and consume module dependency information.	2008-08-23 16:07:20 +00:00
include	The physical address space of cheetah-class CPUs has been extended	2008-09-04 19:43:14 +00:00
isa	Remove the MD isa_irq_pending() and the underlying PCI-specific	2008-04-26 11:01:38 +00:00
pci	Announce the speed of the PCI bus for informational purpose.	2008-08-24 16:22:04 +00:00
sbus	Provide and consume module dependency information.	2008-08-23 15:20:33 +00:00
sparc64	The physical address space of cheetah-class CPUs has been extended	2008-09-04 19:43:14 +00:00