gibbs 52751dc395 Set SCSIGO generically before we determine the phase instead of doing it ... in each phase routine. Saves a few instructions. Be more careful in how we deal with SXFRCTL0. Or in the control bits of interest instead of using mvi. The kernel driver will set the ULTRAEN bit of SXFRCTL0 if we are using Ultra (20MHz) mode and we don't want to clobber it. In sdtr_to_rate divide by two if we are in ultra mode to get the correct setting since its a 20MHz instead of 10MHz scale.		1995-10-26 23:54:13 +00:00
..
aicasm	Remove trailing whitespace.	1995-05-30 08:16:23 +00:00
aic7xxx_asm.1	John Aycock's BSD copyrighted sequencer assembler and sequencer code. This	1995-04-15 21:45:56 +00:00
aic7xxx_asm.c	Remove trailing whitespace.	1995-05-30 08:16:23 +00:00
aic7xxx.seq	Set SCSIGO generically before we determine the phase instead of doing it	1995-10-26 23:54:13 +00:00
aicasm.c	Remove trailing whitespace.	1995-05-30 08:16:23 +00:00