andrew 53f175976e Shift the ITS processor ID after reading it. ...

When using the processor ID value we mask off the low and high bits that
should be zero. Unfortunatly we don't shift the ID value so it won't be
affected. Add the shift when reading the ID as this will need to align
with the address based target value.

MFC after:	2 weeks
Sponsored by:	DARPA, AFRL

2020-01-30 18:49:19 +00:00

..

acpica

arm64 acpi_iort: add some error handling

2019-06-24 21:24:55 +00:00

arm64

Shift the ITS processor ID after reading it.

2020-01-30 18:49:19 +00:00

cavium

Rename the ThunderX CPU identification macros to include the X. This is the

2018-06-13 12:17:11 +00:00

cloudabi32

Use uintptr_t instead of register_t * for the stack base.

2019-12-03 23:17:54 +00:00

cloudabi64

Use uintptr_t instead of register_t * for the stack base.

2019-12-03 23:17:54 +00:00

conf

arm64: rockchip: Add RK3399 PWM driver

2020-01-16 21:25:13 +00:00

coresight

Extract eventfilter declarations to sys/_eventfilter.h

2019-05-20 00:38:23 +00:00

include

Print missing ID_AA64PFR{0,1}_EL1 register fields.

2020-01-23 16:10:38 +00:00

intel

Add support for Intel Stratix 10 platform.

2019-09-13 16:50:57 +00:00

linux

sysent targets: further cleanup and deduplication

2020-01-18 20:37:45 +00:00

qualcomm

Enable Qualcomm Debug Subsystem (QDSS) block on MSM8916 SoC.

2018-04-10 12:53:48 +00:00

rockchip

Enable USB3 support for Rockchip RK3328 SoC.

2020-01-29 09:36:59 +00:00