38e77638a4
- Allocate coherent DMA memory for the request/response queue area and and the FC scratch area. These changes allow isp(4) to work properly on sparc64 with usage of the IOMMU streaming buffers enabled. Approved by: mjacob MFC after: 2 weeks
721 lines
19 KiB
C
721 lines
19 KiB
C
/*-
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* Copyright (c) 1997-2006 by Matthew Jacob
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* SBus specific probe and attach routines for Qlogic ISP SCSI adapters.
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* FreeBSD Version.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/linker.h>
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#include <sys/firmware.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/resource.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#include <machine/ofw_machdep.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <sparc64/sbus/sbusvar.h>
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#include <dev/isp/isp_freebsd.h>
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static uint32_t isp_sbus_rd_reg(ispsoftc_t *, int);
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static void isp_sbus_wr_reg(ispsoftc_t *, int, uint32_t);
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static int isp_sbus_rd_isr(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
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static int isp_sbus_mbxdma(ispsoftc_t *);
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static int isp_sbus_dmasetup(ispsoftc_t *, XS_T *, void *);
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static void isp_sbus_reset0(ispsoftc_t *);
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static void isp_sbus_reset1(ispsoftc_t *);
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static void isp_sbus_dumpregs(ispsoftc_t *, const char *);
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static struct ispmdvec mdvec = {
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isp_sbus_rd_isr,
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isp_sbus_rd_reg,
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isp_sbus_wr_reg,
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isp_sbus_mbxdma,
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isp_sbus_dmasetup,
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isp_common_dmateardown,
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isp_sbus_reset0,
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isp_sbus_reset1,
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isp_sbus_dumpregs,
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NULL,
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BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
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};
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static int isp_sbus_probe (device_t);
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static int isp_sbus_attach (device_t);
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#define ISP_SBD(isp) ((struct isp_sbussoftc *)isp)->sbus_dev
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struct isp_sbussoftc {
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ispsoftc_t sbus_isp;
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device_t sbus_dev;
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struct resource * sbus_reg;
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void * ih;
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int16_t sbus_poff[_NREG_BLKS];
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sdparam sbus_param;
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struct isp_spi sbus_spi;
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struct ispmdvec sbus_mdvec;
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struct resource * sbus_ires;
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};
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static device_method_t isp_sbus_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, isp_sbus_probe),
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DEVMETHOD(device_attach, isp_sbus_attach),
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{ 0, 0 }
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};
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static driver_t isp_sbus_driver = {
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"isp", isp_sbus_methods, sizeof (struct isp_sbussoftc)
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};
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static devclass_t isp_devclass;
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DRIVER_MODULE(isp, sbus, isp_sbus_driver, isp_devclass, 0, 0);
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static int
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isp_sbus_probe(device_t dev)
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{
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int found = 0;
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const char *name = ofw_bus_get_name(dev);
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if (strcmp(name, "SUNW,isp") == 0 ||
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strcmp(name, "QLGC,isp") == 0 ||
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strcmp(name, "ptisp") == 0 ||
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strcmp(name, "PTI,ptisp") == 0) {
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found++;
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}
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if (!found)
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return (ENXIO);
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if (isp_announced == 0 && bootverbose) {
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printf("Qlogic ISP Driver, FreeBSD Version %d.%d, "
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"Core Version %d.%d\n",
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ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR,
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ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR);
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isp_announced++;
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}
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return (0);
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}
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static int
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isp_sbus_attach(device_t dev)
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{
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struct resource *regs;
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int tval, iqd, isp_debug, role, rid, ispburst, default_id;
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struct isp_sbussoftc *sbs;
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ispsoftc_t *isp = NULL;
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int locksetup = 0;
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int ints_setup = 0;
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/*
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* Figure out if we're supposed to skip this one.
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* If we are, we actually go to ISP_ROLE_NONE.
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*/
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tval = 0;
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"disable", &tval) == 0 && tval) {
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device_printf(dev, "device is disabled\n");
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/* but return 0 so the !$)$)*!$*) unit isn't reused */
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return (0);
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}
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role = 0;
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"role", &role) == 0 &&
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((role & ~(ISP_ROLE_INITIATOR|ISP_ROLE_TARGET)) == 0)) {
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device_printf(dev, "setting role to 0x%x\n", role);
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} else {
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role = ISP_DEFAULT_ROLES;
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}
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sbs = malloc(sizeof (*sbs), M_DEVBUF, M_NOWAIT | M_ZERO);
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if (sbs == NULL) {
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device_printf(dev, "cannot allocate softc\n");
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return (ENOMEM);
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}
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regs = NULL;
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iqd = 0;
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rid = 0;
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regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
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if (regs == 0) {
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device_printf(dev, "unable to map registers\n");
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goto bad;
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}
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sbs->sbus_dev = dev;
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sbs->sbus_reg = regs;
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sbs->sbus_mdvec = mdvec;
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sbs->sbus_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF;
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sbs->sbus_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = SBUS_MBOX_REGS_OFF;
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sbs->sbus_poff[SXP_BLOCK >> _BLK_REG_SHFT] = SBUS_SXP_REGS_OFF;
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sbs->sbus_poff[RISC_BLOCK >> _BLK_REG_SHFT] = SBUS_RISC_REGS_OFF;
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sbs->sbus_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF;
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isp = &sbs->sbus_isp;
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isp->isp_bus_tag = rman_get_bustag(regs);
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isp->isp_bus_handle = rman_get_bushandle(regs);
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isp->isp_mdvec = &sbs->sbus_mdvec;
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isp->isp_bustype = ISP_BT_SBUS;
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isp->isp_type = ISP_HA_SCSI_UNKNOWN;
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isp->isp_param = &sbs->sbus_param;
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isp->isp_osinfo.pc.ptr = &sbs->sbus_spi;
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isp->isp_revision = 0; /* XXX */
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isp->isp_dev = dev;
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isp->isp_nchan = 1;
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ISP_SET_PC(isp, 0, def_role, role);
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/*
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* Get the clock frequency and convert it from HZ to MHz,
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* rounding up. This defaults to 25MHz if there isn't a
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* device specific one in the OFW device tree.
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*/
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sbs->sbus_mdvec.dv_clock = (sbus_get_clockfreq(dev) + 500000)/1000000;
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/*
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* Now figure out what the proper burst sizes, etc., to use.
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* Unfortunately, there is no ddi_dma_burstsizes here which
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* walks up the tree finding the limiting burst size node (if
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* any). We just use what's here for isp.
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*/
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ispburst = sbus_get_burstsz(dev);
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if (ispburst == 0) {
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ispburst = SBUS_BURST_32 - 1;
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}
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sbs->sbus_mdvec.dv_conf1 = 0;
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if (ispburst & (1 << 5)) {
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sbs->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_32;
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} else if (ispburst & (1 << 4)) {
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sbs->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_16;
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} else if (ispburst & (1 << 3)) {
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sbs->sbus_mdvec.dv_conf1 =
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BIU_SBUS_CONF1_BURST8 | BIU_SBUS_CONF1_FIFO_8;
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}
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if (sbs->sbus_mdvec.dv_conf1) {
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sbs->sbus_mdvec.dv_conf1 |= BIU_BURST_ENABLE;
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}
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/*
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* We don't trust NVRAM on SBus cards
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*/
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isp->isp_confopts |= ISP_CFG_NONVRAM;
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/*
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* Mark things if we're a PTI SBus adapter.
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*/
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if (strcmp("PTI,ptisp", ofw_bus_get_name(dev)) == 0 ||
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strcmp("ptisp", ofw_bus_get_name(dev)) == 0) {
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SDPARAM(isp, 0)->isp_ptisp = 1;
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}
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isp->isp_osinfo.fw = firmware_get("isp_1000");
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if (isp->isp_osinfo.fw) {
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union {
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const void *cp;
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uint16_t *sp;
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} stupid;
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stupid.cp = isp->isp_osinfo.fw->data;
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isp->isp_mdvec->dv_ispfw = stupid.sp;
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}
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tval = 0;
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"fwload_disable", &tval) == 0 && tval != 0) {
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isp->isp_confopts |= ISP_CFG_NORELOAD;
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}
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default_id = -1;
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"iid", &tval) == 0) {
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default_id = tval;
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isp->isp_confopts |= ISP_CFG_OWNLOOPID;
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}
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if (default_id == -1) {
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default_id = OF_getscsinitid(dev);
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}
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ISP_SPI_PC(isp, 0)->iid = default_id;
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isp_debug = 0;
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(void) resource_int_value(device_get_name(dev), device_get_unit(dev),
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"debug", &isp_debug);
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/* Make sure the lock is set up. */
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mtx_init(&isp->isp_osinfo.lock, "isp", NULL, MTX_DEF);
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locksetup++;
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iqd = 0;
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sbs->sbus_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
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RF_ACTIVE | RF_SHAREABLE);
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if (sbs->sbus_ires == NULL) {
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device_printf(dev, "could not allocate interrupt\n");
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goto bad;
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}
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if (isp_setup_intr(dev, sbs->sbus_ires, ISP_IFLAGS, NULL,
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isp_platform_intr, isp, &sbs->ih)) {
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device_printf(dev, "could not setup interrupt\n");
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goto bad;
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}
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ints_setup++;
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/*
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* Set up logging levels.
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*/
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if (isp_debug) {
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isp->isp_dblev = isp_debug;
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} else {
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isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR;
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}
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if (bootverbose) {
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isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO;
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}
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/*
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* Make sure we're in reset state.
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*/
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ISP_LOCK(isp);
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isp_reset(isp, 1);
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if (isp->isp_state != ISP_RESETSTATE) {
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isp_uninit(isp);
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ISP_UNLOCK(isp);
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goto bad;
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}
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isp_init(isp);
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if (isp->isp_state == ISP_INITSTATE) {
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isp->isp_state = ISP_RUNSTATE;
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}
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ISP_UNLOCK(isp);
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if (isp_attach(isp)) {
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ISP_LOCK(isp);
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isp_uninit(isp);
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ISP_UNLOCK(isp);
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goto bad;
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}
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return (0);
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bad:
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if (sbs && ints_setup) {
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(void) bus_teardown_intr(dev, sbs->sbus_ires, sbs->ih);
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}
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if (sbs && sbs->sbus_ires) {
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bus_release_resource(dev, SYS_RES_IRQ, iqd, sbs->sbus_ires);
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}
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if (locksetup && isp) {
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mtx_destroy(&isp->isp_osinfo.lock);
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}
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if (regs) {
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(void) bus_release_resource(dev, SYS_RES_MEMORY, 0, regs);
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}
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if (sbs) {
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free(sbs, M_DEVBUF);
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}
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return (ENXIO);
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}
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#define IspVirt2Off(a, x) \
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(((struct isp_sbussoftc *)a)->sbus_poff[((x) & _BLK_REG_MASK) >> \
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_BLK_REG_SHFT] + ((x) & 0xff))
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#define BXR2(sbc, off) \
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bus_space_read_2(isp->isp_bus_tag, isp->isp_bus_handle, off)
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static int
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isp_sbus_rd_isr(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbp)
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{
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uint16_t isr, sema;
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isr = BXR2(sbc, IspVirt2Off(isp, BIU_ISR));
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sema = BXR2(sbc, IspVirt2Off(isp, BIU_SEMA));
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isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema);
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isr &= INT_PENDING_MASK(isp);
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sema &= BIU_SEMA_LOCK;
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if (isr == 0 && sema == 0) {
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return (0);
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}
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*isrp = isr;
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if ((*semap = sema) != 0) {
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*mbp = BXR2(sbc, IspVirt2Off(isp, OUTMAILBOX0));
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}
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return (1);
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}
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|
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static uint32_t
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isp_sbus_rd_reg(ispsoftc_t *isp, int regoff)
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{
|
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uint16_t rval;
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struct isp_sbussoftc *sbs = (struct isp_sbussoftc *) isp;
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int offset = sbs->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT];
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offset += (regoff & 0xff);
|
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rval = bus_space_read_2(isp->isp_bus_tag, isp->isp_bus_handle, offset);
|
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isp_prt(isp, ISP_LOGDEBUG3,
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"isp_sbus_rd_reg(off %x) = %x", regoff, rval);
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return (rval);
|
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}
|
|
|
|
static void
|
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isp_sbus_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val)
|
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{
|
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struct isp_sbussoftc *sbs = (struct isp_sbussoftc *) isp;
|
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int offset = sbs->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT];
|
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offset += (regoff & 0xff);
|
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isp_prt(isp, ISP_LOGDEBUG3,
|
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"isp_sbus_wr_reg(off %x) = %x", regoff, val);
|
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bus_space_write_2(isp->isp_bus_tag, isp->isp_bus_handle, offset, val);
|
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MEMORYBARRIER(isp, SYNC_REG, offset, 2, -1);
|
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}
|
|
|
|
struct imush {
|
|
ispsoftc_t *isp;
|
|
int error;
|
|
};
|
|
|
|
static void imc(void *, bus_dma_segment_t *, int, int);
|
|
|
|
static void
|
|
imc(void *arg, bus_dma_segment_t *segs, int nseg, int error)
|
|
{
|
|
struct imush *imushp = (struct imush *) arg;
|
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if (error) {
|
|
imushp->error = error;
|
|
} else {
|
|
ispsoftc_t *isp =imushp->isp;
|
|
bus_addr_t addr = segs->ds_addr;
|
|
|
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isp->isp_rquest_dma = addr;
|
|
addr += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
|
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isp->isp_result_dma = addr;
|
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}
|
|
}
|
|
|
|
static int
|
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isp_sbus_mbxdma(ispsoftc_t *isp)
|
|
{
|
|
caddr_t base;
|
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uint32_t len;
|
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int i, error, ns;
|
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struct imush im;
|
|
|
|
/*
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* Already been here? If so, leave...
|
|
*/
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if (isp->isp_rquest) {
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return (0);
|
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}
|
|
|
|
ISP_UNLOCK(isp);
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|
|
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len = sizeof (struct isp_pcmd) * isp->isp_maxcmds;
|
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isp->isp_osinfo.pcmd_pool = (struct isp_pcmd *)
|
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malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
|
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if (isp->isp_osinfo.pcmd_pool == NULL) {
|
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isp_prt(isp, ISP_LOGERR, "cannot alloc pcmd pool");
|
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ISP_LOCK(isp);
|
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return (1);
|
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}
|
|
|
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len = sizeof (isp_hdl_t *) * isp->isp_maxcmds;
|
|
isp->isp_xflist = (isp_hdl_t *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
|
|
if (isp->isp_xflist == NULL) {
|
|
isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array");
|
|
ISP_LOCK(isp);
|
|
return (1);
|
|
}
|
|
for (len = 0; len < isp->isp_maxcmds - 1; len++) {
|
|
isp->isp_xflist[len].cmd = &isp->isp_xflist[len+1];
|
|
}
|
|
isp->isp_xffree = isp->isp_xflist;
|
|
len = sizeof (bus_dmamap_t) * isp->isp_maxcmds;
|
|
|
|
if (isp_dma_tag_create(BUS_DMA_ROOTARG(ISP_SBD(isp)), 1,
|
|
BUS_SPACE_MAXADDR_24BIT+1, BUS_SPACE_MAXADDR_32BIT,
|
|
BUS_SPACE_MAXADDR_32BIT, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT,
|
|
ISP_NSEGS, BUS_SPACE_MAXADDR_24BIT, 0, &isp->isp_osinfo.dmat)) {
|
|
isp_prt(isp, ISP_LOGERR, "could not create master dma tag");
|
|
free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
|
|
free(isp->isp_xflist, M_DEVBUF);
|
|
ISP_LOCK(isp);
|
|
return(1);
|
|
}
|
|
|
|
/*
|
|
* Allocate and map the request, result queues, plus FC scratch area.
|
|
*/
|
|
len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
|
|
len += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
|
|
|
|
ns = (len / PAGE_SIZE) + 1;
|
|
if (isp_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN,
|
|
BUS_SPACE_MAXADDR_24BIT+1, BUS_SPACE_MAXADDR_32BIT,
|
|
BUS_SPACE_MAXADDR_32BIT, NULL, NULL, len, ns,
|
|
BUS_SPACE_MAXADDR_24BIT, 0, &isp->isp_osinfo.cdmat)) {
|
|
isp_prt(isp, ISP_LOGERR,
|
|
"cannot create a dma tag for control spaces");
|
|
free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
|
|
free(isp->isp_xflist, M_DEVBUF);
|
|
ISP_LOCK(isp);
|
|
return (1);
|
|
}
|
|
|
|
if (bus_dmamem_alloc(isp->isp_osinfo.cdmat, (void **)&base, BUS_DMA_NOWAIT | BUS_DMA_COHERENT,
|
|
&isp->isp_osinfo.cdmap) != 0) {
|
|
isp_prt(isp, ISP_LOGERR,
|
|
"cannot allocate %d bytes of CCB memory", len);
|
|
bus_dma_tag_destroy(isp->isp_osinfo.cdmat);
|
|
free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
|
|
free(isp->isp_xflist, M_DEVBUF);
|
|
ISP_LOCK(isp);
|
|
return (1);
|
|
}
|
|
|
|
for (i = 0; i < isp->isp_maxcmds; i++) {
|
|
struct isp_pcmd *pcmd = &isp->isp_osinfo.pcmd_pool[i];
|
|
error = bus_dmamap_create(isp->isp_osinfo.dmat, 0, &pcmd->dmap);
|
|
if (error) {
|
|
isp_prt(isp, ISP_LOGERR,
|
|
"error %d creating per-cmd DMA maps", error);
|
|
while (--i >= 0) {
|
|
bus_dmamap_destroy(isp->isp_osinfo.dmat,
|
|
isp->isp_osinfo.pcmd_pool[i].dmap);
|
|
}
|
|
goto bad;
|
|
}
|
|
callout_init_mtx(&pcmd->wdog, &isp->isp_osinfo.lock, 0);
|
|
if (i == isp->isp_maxcmds-1) {
|
|
pcmd->next = NULL;
|
|
} else {
|
|
pcmd->next = &isp->isp_osinfo.pcmd_pool[i+1];
|
|
}
|
|
}
|
|
isp->isp_osinfo.pcmd_free = &isp->isp_osinfo.pcmd_pool[0];
|
|
|
|
im.isp = isp;
|
|
im.error = 0;
|
|
bus_dmamap_load(isp->isp_osinfo.cdmat, isp->isp_osinfo.cdmap, base, len, imc, &im, 0);
|
|
if (im.error) {
|
|
isp_prt(isp, ISP_LOGERR,
|
|
"error %d loading dma map for control areas", im.error);
|
|
goto bad;
|
|
}
|
|
|
|
isp->isp_rquest = base;
|
|
base += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
|
|
isp->isp_result = base;
|
|
ISP_LOCK(isp);
|
|
return (0);
|
|
|
|
bad:
|
|
bus_dmamem_free(isp->isp_osinfo.cdmat, base, isp->isp_osinfo.cdmap);
|
|
bus_dma_tag_destroy(isp->isp_osinfo.cdmat);
|
|
free(isp->isp_xflist, M_DEVBUF);
|
|
free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
|
|
isp->isp_rquest = NULL;
|
|
ISP_LOCK(isp);
|
|
return (1);
|
|
}
|
|
|
|
typedef struct {
|
|
ispsoftc_t *isp;
|
|
void *cmd_token;
|
|
void *rq; /* original request */
|
|
int error;
|
|
bus_size_t mapsize;
|
|
} mush_t;
|
|
|
|
#define MUSHERR_NOQENTRIES -2
|
|
|
|
static void dma2(void *, bus_dma_segment_t *, int, int);
|
|
|
|
static void
|
|
dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
|
|
{
|
|
mush_t *mp;
|
|
ispsoftc_t *isp;
|
|
struct ccb_scsiio *csio;
|
|
isp_ddir_t ddir;
|
|
ispreq_t *rq;
|
|
|
|
mp = (mush_t *) arg;
|
|
if (error) {
|
|
mp->error = error;
|
|
return;
|
|
}
|
|
csio = mp->cmd_token;
|
|
isp = mp->isp;
|
|
rq = mp->rq;
|
|
if (nseg) {
|
|
if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
|
|
bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREREAD);
|
|
ddir = ISP_FROM_DEVICE;
|
|
} else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) {
|
|
bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREWRITE);
|
|
ddir = ISP_TO_DEVICE;
|
|
} else {
|
|
ddir = ISP_NOXFR;
|
|
}
|
|
} else {
|
|
dm_segs = NULL;
|
|
nseg = 0;
|
|
ddir = ISP_NOXFR;
|
|
}
|
|
|
|
if (isp_send_cmd(isp, rq, dm_segs, nseg, XS_XFRLEN(csio), ddir) != CMD_QUEUED) {
|
|
mp->error = MUSHERR_NOQENTRIES;
|
|
}
|
|
}
|
|
|
|
static int
|
|
isp_sbus_dmasetup(ispsoftc_t *isp, struct ccb_scsiio *csio, void *ff)
|
|
{
|
|
mush_t mush, *mp;
|
|
void (*eptr)(void *, bus_dma_segment_t *, int, int);
|
|
|
|
mp = &mush;
|
|
mp->isp = isp;
|
|
mp->cmd_token = csio;
|
|
mp->rq = ff;
|
|
mp->error = 0;
|
|
mp->mapsize = 0;
|
|
|
|
eptr = dma2;
|
|
|
|
if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_NONE || (csio->dxfer_len == 0)) {
|
|
(*eptr)(mp, NULL, 0, 0);
|
|
} else if ((csio->ccb_h.flags & CAM_SCATTER_VALID) == 0) {
|
|
if ((csio->ccb_h.flags & CAM_DATA_PHYS) == 0) {
|
|
int error;
|
|
error = bus_dmamap_load(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, csio->data_ptr, csio->dxfer_len, eptr, mp, 0);
|
|
#if 0
|
|
xpt_print(csio->ccb_h.path, "%s: bus_dmamap_load " "ptr %p len %d returned %d\n", __func__, csio->data_ptr, csio->dxfer_len, error);
|
|
#endif
|
|
|
|
if (error == EINPROGRESS) {
|
|
bus_dmamap_unload(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap);
|
|
mp->error = EINVAL;
|
|
isp_prt(isp, ISP_LOGERR, "deferred dma allocation not supported");
|
|
} else if (error && mp->error == 0) {
|
|
#ifdef DIAGNOSTIC
|
|
isp_prt(isp, ISP_LOGERR, "error %d in dma mapping code", error);
|
|
#endif
|
|
mp->error = error;
|
|
}
|
|
} else {
|
|
/* Pointer to physical buffer */
|
|
struct bus_dma_segment seg;
|
|
seg.ds_addr = (bus_addr_t)(vm_offset_t)csio->data_ptr;
|
|
seg.ds_len = csio->dxfer_len;
|
|
(*eptr)(mp, &seg, 1, 0);
|
|
}
|
|
} else {
|
|
struct bus_dma_segment *segs;
|
|
|
|
if ((csio->ccb_h.flags & CAM_DATA_PHYS) != 0) {
|
|
isp_prt(isp, ISP_LOGERR, "Physical segment pointers unsupported");
|
|
mp->error = EINVAL;
|
|
} else if ((csio->ccb_h.flags & CAM_SG_LIST_PHYS) == 0) {
|
|
isp_prt(isp, ISP_LOGERR, "Physical SG/LIST Phys segment pointers unsupported");
|
|
mp->error = EINVAL;
|
|
} else {
|
|
/* Just use the segments provided */
|
|
segs = (struct bus_dma_segment *) csio->data_ptr;
|
|
(*eptr)(mp, segs, csio->sglist_cnt, 0);
|
|
}
|
|
}
|
|
if (mp->error) {
|
|
int retval = CMD_COMPLETE;
|
|
if (mp->error == MUSHERR_NOQENTRIES) {
|
|
retval = CMD_EAGAIN;
|
|
} else if (mp->error == EFBIG) {
|
|
XS_SETERR(csio, CAM_REQ_TOO_BIG);
|
|
} else if (mp->error == EINVAL) {
|
|
XS_SETERR(csio, CAM_REQ_INVALID);
|
|
} else {
|
|
XS_SETERR(csio, CAM_UNREC_HBA_ERROR);
|
|
}
|
|
return (retval);
|
|
}
|
|
return (CMD_QUEUED);
|
|
}
|
|
|
|
static void
|
|
isp_sbus_reset0(ispsoftc_t *isp)
|
|
{
|
|
ISP_DISABLE_INTS(isp);
|
|
}
|
|
|
|
static void
|
|
isp_sbus_reset1(ispsoftc_t *isp)
|
|
{
|
|
ISP_ENABLE_INTS(isp);
|
|
}
|
|
|
|
static void
|
|
isp_sbus_dumpregs(ispsoftc_t *isp, const char *msg)
|
|
{
|
|
if (msg)
|
|
printf("%s: %s\n", device_get_nameunit(isp->isp_dev), msg);
|
|
else
|
|
printf("%s:\n", device_get_nameunit(isp->isp_dev));
|
|
printf(" biu_conf1=%x", ISP_READ(isp, BIU_CONF1));
|
|
printf(" biu_icr=%x biu_isr=%x biu_sema=%x ", ISP_READ(isp, BIU_ICR),
|
|
ISP_READ(isp, BIU_ISR), ISP_READ(isp, BIU_SEMA));
|
|
printf("risc_hccr=%x\n", ISP_READ(isp, HCCR));
|
|
|
|
|
|
ISP_WRITE(isp, HCCR, HCCR_CMD_PAUSE);
|
|
printf(" cdma_conf=%x cdma_sts=%x cdma_fifostat=%x\n",
|
|
ISP_READ(isp, CDMA_CONF), ISP_READ(isp, CDMA_STATUS),
|
|
ISP_READ(isp, CDMA_FIFO_STS));
|
|
printf(" ddma_conf=%x ddma_sts=%x ddma_fifostat=%x\n",
|
|
ISP_READ(isp, DDMA_CONF), ISP_READ(isp, DDMA_STATUS),
|
|
ISP_READ(isp, DDMA_FIFO_STS));
|
|
printf(" sxp_int=%x sxp_gross=%x sxp(scsi_ctrl)=%x\n",
|
|
ISP_READ(isp, SXP_INTERRUPT),
|
|
ISP_READ(isp, SXP_GROSS_ERR),
|
|
ISP_READ(isp, SXP_PINS_CTRL));
|
|
ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE);
|
|
printf(" mbox regs: %x %x %x %x %x\n",
|
|
ISP_READ(isp, OUTMAILBOX0), ISP_READ(isp, OUTMAILBOX1),
|
|
ISP_READ(isp, OUTMAILBOX2), ISP_READ(isp, OUTMAILBOX3),
|
|
ISP_READ(isp, OUTMAILBOX4));
|
|
}
|