7134a2219c
I/O8+ and I/O4+ intelligent serial controllers. si is for completely different hardware, also made by Specialix.
160 lines
4.5 KiB
C
160 lines
4.5 KiB
C
/*
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* Device driver for Specialix I/O8+ multiport serial card.
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*
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* Copyright 2003 Frank Mayhar <frank@exit.com>
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*
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* Derived from the "si" driver by Peter Wemm <peter@netplex.com.au>, using
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* lots of information from the Linux "specialix" driver by Roger Wolff
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* <R.E.Wolff@BitWizard.nl> and from the Intel CD1865 "Intelligent Eight-
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* Channel Communications Controller" datasheet. Roger was also nice
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* enough to answer numerous questions about stuff specific to the I/O8+
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* not covered by the CD1865 datasheet.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notices, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notices, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHORS BE LIABLE.
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*
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* $FreeBSD$
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*/
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/* Utility functions and macros for the Specialix I/O8+ driver. */
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/*
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* sx_cd1865_out()
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* Write a CD1865 register on the card.
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*/
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static __inline void
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sx_cd1865_out(
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struct sx_softc *sc,
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unsigned int reg,
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unsigned char val)
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{
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bus_space_write_1(sc->sc_st, sc->sc_sh, SX_ADDR_REG, reg);
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bus_space_write_1(sc->sc_st, sc->sc_sh, SX_DATA_REG, val);
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}
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/*
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* sx_cd1865_in()
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* Read a register from the card.
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*/
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static __inline unsigned char
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sx_cd1865_in(
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struct sx_softc *sc,
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unsigned int reg)
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{
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bus_space_write_1(sc->sc_st, sc->sc_sh, SX_ADDR_REG, reg);
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return(bus_space_read_1(sc->sc_st, sc->sc_sh, SX_DATA_REG));
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}
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/*
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* sx_cd1865_bis()
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* Set bits in a CD1865 register.
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*/
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static __inline void
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sx_cd1865_bis(
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struct sx_softc *sc,
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unsigned int reg,
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unsigned char bits)
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{
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register unsigned char rval;
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rval = sx_cd1865_in(sc, reg);
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rval |= bits;
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sx_cd1865_out(sc, reg, rval);
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}
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/*
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* sx_cd1865_bic()
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* Clear bits in a CD1865 register.
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*/
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static __inline void
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sx_cd1865_bic(
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struct sx_softc *sc,
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unsigned int reg,
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unsigned char bits)
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{
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register unsigned char rval;
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rval = sx_cd1865_in(sc, reg);
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rval &= ~bits;
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sx_cd1865_out(sc, reg, rval);
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}
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/*
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* sx_cd1865_wait_CCR()
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* Spin waiting for the board Channel Command Register to clear.
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*
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* Description:
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* The CD1865 processor clears the Channel Command Register to
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* indicate that it has completed the last command. This routine
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* waits for the CCR to become zero by watching the register,
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* delaying ten microseconds between each check. We time out after
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* ten milliseconds (or SX_CCR_TIMEOUT microseconds).
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*/
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static __inline void
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sx_cd1865_wait_CCR(
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struct sx_softc *sc,
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unsigned int ei_flag)
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{
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unsigned int to = SX_CCR_TIMEOUT/10;
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while (to-- > 0) {
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if (sx_cd1865_in(sc, CD1865_CCR|ei_flag) == 0)
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return;
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DELAY(10);
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}
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printf("sx: Timeout waiting for CCR to clear.\n");
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}
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/*
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* sx_cd1865_etcmode()
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* Set or clear embedded transmit command mode on a CD1865 port.
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*
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* Description:
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* We can use commands embedded in the transmit data stream to do
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* things like start and stop breaks or insert time delays. We normally
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* run with embedded commands disabled; this routine selects the channel
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* we're dealing with and enables or disables embedded commands depending
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* on the flag passed to it. The caller must remember this state and
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* escape any NULs it sends while embedded commands are enabled.
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* Should be called at spltty(). Disables interrupts for the duration
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* of the routine.
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*/
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static __inline void
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sx_cd1865_etcmode(
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struct sx_softc *sc,
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unsigned int ei_flag,
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int chan,
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int mode)
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{
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sx_cd1865_out(sc, CD1865_CAR|ei_flag, chan); /* Select channel. */
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if (mode) { /* Enable embedded commands? */
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sx_cd1865_bis(sc, CD1865_COR2|ei_flag, CD1865_COR2_ETC);
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}
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else {
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sx_cd1865_bic(sc, CD1865_COR2|ei_flag, CD1865_COR2_ETC);
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}
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/*
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* Wait for the CCR to clear, ding the card, let it know stuff
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* changed, then wait for CCR to clear again.
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*/
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sx_cd1865_wait_CCR(sc, ei_flag);
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sx_cd1865_out(sc, CD1865_CCR|ei_flag, CD1865_CCR_CORCHG2);
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sx_cd1865_wait_CCR(sc, ei_flag);
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}
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int sx_probe_io8(device_t dev);
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int sx_init_cd1865(struct sx_softc *sc, int unit);
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struct sx_port *sx_int_port(struct sx_softc *sc, int unit);
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