aa6de8e012
The specific intent of this commit is to pave the way for importing Compaq XP1000 support. These changes should not affect the i386 port. Reviewed by: Doug Rabson <dfr@nlsystems.com> (actually, he walked me through most of it & deserves more than reviewd-by credit )
440 lines
10 KiB
C
440 lines
10 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: lca.c,v 1.8 1999/05/10 15:46:38 peter Exp $
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <alpha/pci/lcareg.h>
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#include <alpha/pci/lcavar.h>
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#include <alpha/pci/pcibus.h>
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#include <alpha/isa/isavar.h>
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#include <machine/intr.h>
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#include <machine/resource.h>
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#include <machine/cpuconf.h>
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#include <machine/swiz.h>
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#define KV(pa) ALPHA_PHYS_TO_K0SEG(pa)
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static devclass_t lca_devclass;
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static device_t lca0; /* XXX only one for now */
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struct lca_softc {
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int junk;
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};
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#define LCA_SOFTC(dev) (struct lca_softc*) device_get_softc(dev)
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static alpha_chipset_inb_t lca_inb;
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static alpha_chipset_inw_t lca_inw;
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static alpha_chipset_inl_t lca_inl;
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static alpha_chipset_outb_t lca_outb;
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static alpha_chipset_outw_t lca_outw;
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static alpha_chipset_outl_t lca_outl;
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static alpha_chipset_readb_t lca_readb;
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static alpha_chipset_readw_t lca_readw;
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static alpha_chipset_readl_t lca_readl;
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static alpha_chipset_writeb_t lca_writeb;
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static alpha_chipset_writew_t lca_writew;
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static alpha_chipset_writel_t lca_writel;
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static alpha_chipset_maxdevs_t lca_maxdevs;
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static alpha_chipset_cfgreadb_t lca_cfgreadb;
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static alpha_chipset_cfgreadw_t lca_cfgreadw;
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static alpha_chipset_cfgreadl_t lca_cfgreadl;
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static alpha_chipset_cfgwriteb_t lca_cfgwriteb;
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static alpha_chipset_cfgwritew_t lca_cfgwritew;
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static alpha_chipset_cfgwritel_t lca_cfgwritel;
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static alpha_chipset_addrcvt_t lca_cvt_dense;
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static alpha_chipset_read_hae_t lca_read_hae;
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static alpha_chipset_write_hae_t lca_write_hae;
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static alpha_chipset_t lca_chipset = {
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lca_inb,
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lca_inw,
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lca_inl,
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lca_outb,
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lca_outw,
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lca_outl,
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lca_readb,
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lca_readw,
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lca_readl,
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lca_writeb,
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lca_writew,
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lca_writel,
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lca_maxdevs,
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lca_cfgreadb,
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lca_cfgreadw,
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lca_cfgreadl,
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lca_cfgwriteb,
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lca_cfgwritew,
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lca_cfgwritel,
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lca_cvt_dense,
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NULL,
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lca_read_hae,
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lca_write_hae,
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};
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static u_int8_t
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lca_inb(u_int32_t port)
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{
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alpha_mb();
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return SPARSE_READ_BYTE(KV(LCA_PCI_SIO), port);
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}
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static u_int16_t
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lca_inw(u_int32_t port)
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{
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alpha_mb();
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return SPARSE_READ_WORD(KV(LCA_PCI_SIO), port);
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}
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static u_int32_t
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lca_inl(u_int32_t port)
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{
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alpha_mb();
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return SPARSE_READ_LONG(KV(LCA_PCI_SIO), port);
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}
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static void
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lca_outb(u_int32_t port, u_int8_t data)
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{
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SPARSE_WRITE_BYTE(KV(LCA_PCI_SIO), port, data);
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alpha_wmb();
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}
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static void
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lca_outw(u_int32_t port, u_int16_t data)
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{
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SPARSE_WRITE_WORD(KV(LCA_PCI_SIO), port, data);
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alpha_wmb();
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}
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static void
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lca_outl(u_int32_t port, u_int32_t data)
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{
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SPARSE_WRITE_LONG(KV(LCA_PCI_SIO), port, data);
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alpha_wmb();
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}
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/*
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* The LCA HAE is write-only. According to NetBSD, this is where it starts.
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*/
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static u_int32_t lca_hae_mem = 0x80000000;
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/*
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* The first 16Mb ignores the HAE. The next 112Mb uses the HAE to set
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* the high bits of the PCI address.
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*/
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#define REG1 (1UL << 24)
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static __inline void
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lca_set_hae_mem(u_int32_t *pa)
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{
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int s;
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u_int32_t msb;
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if(*pa >= REG1){
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msb = *pa & 0xf8000000;
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*pa -= msb;
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s = splhigh();
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if (msb != lca_hae_mem) {
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lca_hae_mem = msb;
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REGVAL(LCA_IOC_HAE) = lca_hae_mem;
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alpha_mb();
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alpha_mb();
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}
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splx(s);
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}
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}
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static u_int8_t
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lca_readb(u_int32_t pa)
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{
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alpha_mb();
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lca_set_hae_mem(&pa);
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return SPARSE_READ_BYTE(KV(LCA_PCI_SPARSE), pa);
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}
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static u_int16_t
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lca_readw(u_int32_t pa)
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{
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alpha_mb();
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lca_set_hae_mem(&pa);
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return SPARSE_READ_WORD(KV(LCA_PCI_SPARSE), pa);
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}
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static u_int32_t
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lca_readl(u_int32_t pa)
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{
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alpha_mb();
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lca_set_hae_mem(&pa);
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return SPARSE_READ_LONG(KV(LCA_PCI_SPARSE), pa);
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}
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static void
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lca_writeb(u_int32_t pa, u_int8_t data)
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{
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lca_set_hae_mem(&pa);
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SPARSE_WRITE_BYTE(KV(LCA_PCI_SPARSE), pa, data);
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alpha_wmb();
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}
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static void
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lca_writew(u_int32_t pa, u_int16_t data)
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{
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lca_set_hae_mem(&pa);
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SPARSE_WRITE_WORD(KV(LCA_PCI_SPARSE), pa, data);
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alpha_wmb();
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}
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static void
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lca_writel(u_int32_t pa, u_int32_t data)
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{
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lca_set_hae_mem(&pa);
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SPARSE_WRITE_LONG(KV(LCA_PCI_SPARSE), pa, data);
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alpha_wmb();
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}
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static int
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lca_maxdevs(u_int b)
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{
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return 12; /* XXX */
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}
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#define LCA_CFGOFF(b, s, f, r) \
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((b) ? (((b) << 16) | ((s) << 11) | ((f) << 8) | (r)) \
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: ((1 << ((s) + 11)) | ((f) << 8) | (r)))
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#define LCA_TYPE1_SETUP(b,s) if ((b)) { \
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do { \
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(s) = splhigh(); \
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alpha_mb(); \
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REGVAL(LCA_IOC_CONF) = 1; \
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alpha_mb(); \
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} while(0); \
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}
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#define LCA_TYPE1_TEARDOWN(b,s) if ((b)) { \
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do { \
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alpha_mb(); \
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REGVAL(LCA_IOC_CONF) = 0; \
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alpha_mb(); \
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splx((s)); \
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} while(0); \
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}
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#define CFGREAD(b, s, f, r, width, type) \
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type val = ~0; \
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int ipl = 0; \
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vm_offset_t off = LCA_CFGOFF(b, s, f, r); \
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vm_offset_t kv = SPARSE_##width##_ADDRESS(KV(LCA_PCI_CONF), off); \
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alpha_mb(); \
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LCA_TYPE1_SETUP(b,ipl); \
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if (!badaddr((caddr_t)kv, sizeof(type))) { \
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val = SPARSE_##width##_EXTRACT(off, SPARSE_READ(kv)); \
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} \
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LCA_TYPE1_TEARDOWN(b,ipl); \
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return val
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#define CFGWRITE(b, s, f, r, data, width, type) \
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int ipl = 0; \
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vm_offset_t off = LCA_CFGOFF(b, s, f, r); \
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vm_offset_t kv = SPARSE_##width##_ADDRESS(KV(LCA_PCI_CONF), off); \
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alpha_mb(); \
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LCA_TYPE1_SETUP(b,ipl); \
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if (!badaddr((caddr_t)kv, sizeof(type))) { \
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SPARSE_WRITE(kv, SPARSE_##width##_INSERT(off, data)); \
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alpha_wmb(); \
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} \
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LCA_TYPE1_TEARDOWN(b,ipl); \
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return
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static u_int8_t
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lca_cfgreadb(u_int h, u_int b, u_int s, u_int f, u_int r)
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{
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CFGREAD(b, s, f, r, BYTE, u_int8_t);
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}
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static u_int16_t
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lca_cfgreadw(u_int h, u_int b, u_int s, u_int f, u_int r)
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{
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CFGREAD(b, s, f, r, WORD, u_int16_t);
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}
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static u_int32_t
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lca_cfgreadl(u_int h, u_int b, u_int s, u_int f, u_int r)
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{
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CFGREAD(b, s, f, r, LONG, u_int32_t);
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}
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static void
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lca_cfgwriteb(u_int h, u_int b, u_int s, u_int f, u_int r, u_int8_t data)
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{
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CFGWRITE(b, s, f, r, data, BYTE, u_int8_t);
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}
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static void
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lca_cfgwritew(u_int h, u_int b, u_int s, u_int f, u_int r, u_int16_t data)
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{
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CFGWRITE(b, s, f, r, data, WORD, u_int16_t);
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}
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static void
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lca_cfgwritel(u_int h, u_int b, u_int s, u_int f, u_int r, u_int32_t data)
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{
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CFGWRITE(b, s, f, r, data, LONG, u_int16_t);
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}
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static vm_offset_t
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lca_cvt_dense(vm_offset_t addr)
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{
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addr &= 0xffffffffUL;
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return (addr | LCA_PCI_DENSE);
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}
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static u_int64_t
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lca_read_hae(void)
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{
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return lca_hae_mem & 0xf8000000;
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}
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static void
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lca_write_hae(u_int64_t hae)
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{
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u_int32_t pa = hae;
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lca_set_hae_mem(&pa);
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}
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static int lca_probe(device_t dev);
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static int lca_attach(device_t dev);
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static struct resource *lca_alloc_resource(device_t bus, device_t child,
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int type, int *rid, u_long start,
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u_long end, u_long count,
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u_int flags);
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static int lca_release_resource(device_t bus, device_t child,
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int type, int rid, struct resource *r);
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static device_method_t lca_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, lca_probe),
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DEVMETHOD(device_attach, lca_attach),
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/* Bus interface */
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DEVMETHOD(bus_alloc_resource, lca_alloc_resource),
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DEVMETHOD(bus_release_resource, lca_release_resource),
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DEVMETHOD(bus_activate_resource, pci_activate_resource),
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DEVMETHOD(bus_deactivate_resource, pci_deactivate_resource),
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DEVMETHOD(bus_setup_intr, isa_setup_intr),
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DEVMETHOD(bus_teardown_intr, isa_teardown_intr),
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{ 0, 0 }
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};
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static driver_t lca_driver = {
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"lca",
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lca_methods,
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sizeof(struct lca_softc),
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};
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void
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lca_init()
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{
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static int initted = 0;
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if (initted) return;
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initted = 1;
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/* Type 0 PCI conf access. */
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REGVAL64(LCA_IOC_CONF) = 0;
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if (platform.pci_intr_init)
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platform.pci_intr_init();
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chipset = lca_chipset;
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}
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static int
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lca_probe(device_t dev)
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{
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if (lca0)
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return ENXIO;
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lca0 = dev;
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device_set_desc(dev, "21066 Core Logic chipset"); /* XXX */
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pci_init_resources();
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isa_init_intr();
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device_add_child(dev, "pcib", 0, 0);
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return 0;
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}
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static int
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lca_attach(device_t dev)
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{
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lca_init();
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set_iointr(alpha_dispatch_intr);
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snprintf(chipset_type, sizeof(chipset_type), "lca");
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chipset_bwx = 0;
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chipset_ports = LCA_PCI_SIO;
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chipset_memory = LCA_PCI_SPARSE;
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chipset_dense = LCA_PCI_DENSE;
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chipset_hae_mask = IOC_HAE_ADDREXT;
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bus_generic_attach(dev);
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return 0;
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}
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static struct resource *
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lca_alloc_resource(device_t bus, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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if (type == SYS_RES_IRQ)
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return isa_alloc_intr(bus, child, start);
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else
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return pci_alloc_resource(bus, child, type, rid,
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start, end, count, flags);
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}
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static int
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lca_release_resource(device_t bus, device_t child, int type, int rid,
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struct resource *r)
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{
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if (type == SYS_RES_IRQ)
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return isa_release_intr(bus, child, r);
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else
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return pci_release_resource(bus, child, type, rid, r);
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}
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DRIVER_MODULE(lca, root, lca_driver, lca_devclass, 0, 0);
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