freebsd-skq/gnu/usr.bin/binutils/libbfd/Makefile.mips
Juli Mallett 5619a3e4bf Add/improve mips64r2, Octeon, n32 and n64 support in the toolchain.
o) Add TARGET_ABI to the MIPS toolchain build process.  This sets the default
   ABI to one of o32, n32 or n64.  If it is not set, o32 is assumed as that is
   the current default.
o) Set the default GCC cpu type to any specified TARGET_CPUTYPE.  This is
   necessary to have a working "cc" if e.g. mips64 is specified, as binutils
   will refuse to link objects using different ISAs in some cases.
o) Add support for n32 and n64 ABIs to binutils and GCC.
o) Add additional required libgcc2 stubs for n32 and n64.
o) Add support for the "mips64r2" architecture to GCC.  Add the "octeon"
o) When static linking, wrap default libraries in --start-group and
   --end-group.  This is required for static linking to work on n64 with the
   interdependencies between libraries there.  This is what other OSes that
   support n64 seem to do, as well.
o) Fix our GCC spec to define __mips64 for 64-bit targets, not __mips64__, the
   former being what libgcc, etc., check and the latter seemingly being a
   misspelling of a hand merge from a Linux spec.
o) When no TARGET_CPUTYPE is specified at build time, make GCC take the default
   ISA from the ABI.  Our old defaults were too liberal and assumed that 64-bit
   ABIs should default to the MIPS64 ISA and that 32-bit ABIs should default to
   the MIPS32 ISA, when we are supporting or will support some systems based on
   earlier 32-bit and 64-bit ISAs, most notably MIPS-III.
o) Merge a new opcode file (and support code) from a later version of binutils
   and add flags and code necessary to support Octeon-specific instructions.
   This should also make merging opcodes for other modern architectures easier.

Reviewed by:	imp
2010-06-02 11:06:03 +00:00

44 lines
967 B
Makefile

# $FreeBSD$
#xxxIMPxxx: TARGET_BIG_ENDIAN is lame. We should use the netbsd convention
# of mipsel and mips.
.if !defined(TARGET_BIG_ENDIAN)
_EMULATION_ENDIAN=little
.else
_EMULATION_ENDIAN=big
.endif
DEFAULT_VECTOR= bfd_elf32_tradbigmips_vec
.if defined(TARGET_ABI) && ${TARGET_ABI} != "o32"
.if ${TARGET_ABI} == "n32"
DEFAULT_VECTOR= bfd_elf32_ntrad${_EMULATION_ENDIAN}mips_vec
.elif ${TARGET_ABI} == "n64"
DEFAULT_VECTOR= bfd_elf64_trad${_EMULATION_ENDIAN}mips_vec
.endif
.endif
DEFAULT_VECTOR?=bfd_elf32_trad${_EMULATION_ENDIAN}mips_vec
SRCS+= coff-mips.c \
cpu-mips.c \
ecoff.c \
ecofflink.c \
elf32.c \
elf64.c \
elfn32-mips.c \
elf32-mips.c \
elf64-mips.c \
elfxx-mips.c \
elf32-target.h \
elf64-target.h \
elflink.c
VECS= bfd_elf32_tradbigmips_vec \
bfd_elf32_tradlittlemips_vec \
bfd_elf32_ntradbigmips_vec \
bfd_elf32_ntradlittlemips_vec \
bfd_elf64_tradbigmips_vec \
bfd_elf64_tradlittlemips_vec \
ecoff_little_vec \
ecoff_big_vec