51369649b0
Mainly focus on files that use BSD 3-Clause license. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. Special thanks to Wind River for providing access to "The Duke of Highlander" tool: an older (2014) run over FreeBSD tree was useful as a starting point.
307 lines
7.6 KiB
C
307 lines
7.6 KiB
C
/*-
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* SPDX-License-Identifier: BSD-4-Clause
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*
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* Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed under OpenBSD by
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* Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $NetBSD: pio.h,v 1.1 1998/05/15 10:15:54 tsubai Exp $
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* $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $
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* $FreeBSD$
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*/
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#ifndef _MACHINE_PIO_H_
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#define _MACHINE_PIO_H_
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/*
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* I/O macros.
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*/
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/*
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* Use sync so that bus space operations cannot sneak out the bottom of
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* mutex-protected sections (mutex release does not guarantee completion of
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* accesses to caching-inhibited memory on some systems)
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*/
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#define powerpc_iomb() __asm __volatile("sync" : : : "memory")
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static __inline void
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__outb(volatile u_int8_t *a, u_int8_t v)
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{
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*a = v;
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powerpc_iomb();
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}
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static __inline void
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__outw(volatile u_int16_t *a, u_int16_t v)
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{
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*a = v;
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powerpc_iomb();
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}
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static __inline void
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__outl(volatile u_int32_t *a, u_int32_t v)
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{
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*a = v;
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powerpc_iomb();
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}
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static __inline void
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__outll(volatile u_int64_t *a, u_int64_t v)
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{
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*a = v;
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powerpc_iomb();
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}
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static __inline void
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__outwrb(volatile u_int16_t *a, u_int16_t v)
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{
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__asm__ volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a));
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powerpc_iomb();
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}
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static __inline void
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__outlrb(volatile u_int32_t *a, u_int32_t v)
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{
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__asm__ volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a));
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powerpc_iomb();
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}
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static __inline u_int8_t
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__inb(volatile u_int8_t *a)
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{
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u_int8_t _v_;
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_v_ = *a;
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powerpc_iomb();
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return _v_;
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}
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static __inline u_int16_t
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__inw(volatile u_int16_t *a)
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{
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u_int16_t _v_;
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_v_ = *a;
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powerpc_iomb();
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return _v_;
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}
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static __inline u_int32_t
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__inl(volatile u_int32_t *a)
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{
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u_int32_t _v_;
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_v_ = *a;
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powerpc_iomb();
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return _v_;
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}
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static __inline u_int64_t
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__inll(volatile u_int64_t *a)
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{
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u_int64_t _v_;
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_v_ = *a;
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powerpc_iomb();
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return _v_;
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}
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static __inline u_int16_t
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__inwrb(volatile u_int16_t *a)
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{
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u_int16_t _v_;
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__asm__ volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
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powerpc_iomb();
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return _v_;
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}
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static __inline u_int32_t
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__inlrb(volatile u_int32_t *a)
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{
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u_int32_t _v_;
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__asm__ volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
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powerpc_iomb();
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return _v_;
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}
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#define outb(a,v) (__outb((volatile u_int8_t *)(a), v))
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#define out8(a,v) outb(a,v)
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#define outw(a,v) (__outw((volatile u_int16_t *)(a), v))
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#define out16(a,v) outw(a,v)
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#define outl(a,v) (__outl((volatile u_int32_t *)(a), v))
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#define out32(a,v) outl(a,v)
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#define outll(a,v) (__outll((volatile u_int64_t *)(a), v))
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#define out64(a,v) outll(a,v)
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#define inb(a) (__inb((volatile u_int8_t *)(a)))
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#define in8(a) inb(a)
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#define inw(a) (__inw((volatile u_int16_t *)(a)))
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#define in16(a) inw(a)
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#define inl(a) (__inl((volatile u_int32_t *)(a)))
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#define in32(a) inl(a)
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#define inll(a) (__inll((volatile u_int64_t *)(a)))
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#define in64(a) inll(a)
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#define out8rb(a,v) outb(a,v)
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#define outwrb(a,v) (__outwrb((volatile u_int16_t *)(a), v))
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#define out16rb(a,v) outwrb(a,v)
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#define outlrb(a,v) (__outlrb((volatile u_int32_t *)(a), v))
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#define out32rb(a,v) outlrb(a,v)
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#define in8rb(a) inb(a)
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#define inwrb(a) (__inwrb((volatile u_int16_t *)(a)))
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#define in16rb(a) inwrb(a)
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#define inlrb(a) (__inlrb((volatile u_int32_t *)(a)))
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#define in32rb(a) inlrb(a)
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static __inline void
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__outsb(volatile u_int8_t *a, const u_int8_t *s, size_t c)
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{
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while (c--)
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*a = *s++;
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powerpc_iomb();
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}
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static __inline void
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__outsw(volatile u_int16_t *a, const u_int16_t *s, size_t c)
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{
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while (c--)
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*a = *s++;
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powerpc_iomb();
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}
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static __inline void
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__outsl(volatile u_int32_t *a, const u_int32_t *s, size_t c)
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{
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while (c--)
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*a = *s++;
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powerpc_iomb();
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}
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static __inline void
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__outsll(volatile u_int64_t *a, const u_int64_t *s, size_t c)
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{
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while (c--)
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*a = *s++;
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powerpc_iomb();
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}
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static __inline void
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__outswrb(volatile u_int16_t *a, const u_int16_t *s, size_t c)
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{
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while (c--)
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__asm__ volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a));
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powerpc_iomb();
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}
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static __inline void
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__outslrb(volatile u_int32_t *a, const u_int32_t *s, size_t c)
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{
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while (c--)
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__asm__ volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a));
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powerpc_iomb();
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}
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static __inline void
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__insb(volatile u_int8_t *a, u_int8_t *d, size_t c)
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{
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while (c--)
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*d++ = *a;
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powerpc_iomb();
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}
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static __inline void
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__insw(volatile u_int16_t *a, u_int16_t *d, size_t c)
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{
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while (c--)
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*d++ = *a;
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powerpc_iomb();
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}
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static __inline void
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__insl(volatile u_int32_t *a, u_int32_t *d, size_t c)
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{
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while (c--)
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*d++ = *a;
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powerpc_iomb();
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}
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static __inline void
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__insll(volatile u_int64_t *a, u_int64_t *d, size_t c)
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{
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while (c--)
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*d++ = *a;
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powerpc_iomb();
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}
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static __inline void
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__inswrb(volatile u_int16_t *a, u_int16_t *d, size_t c)
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{
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while (c--)
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__asm__ volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
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powerpc_iomb();
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}
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static __inline void
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__inslrb(volatile u_int32_t *a, u_int32_t *d, size_t c)
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{
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while (c--)
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__asm__ volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
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powerpc_iomb();
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}
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#define outsb(a,s,c) (__outsb((volatile u_int8_t *)(a), s, c))
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#define outs8(a,s,c) outsb(a,s,c)
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#define outsw(a,s,c) (__outsw((volatile u_int16_t *)(a), s, c))
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#define outs16(a,s,c) outsw(a,s,c)
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#define outsl(a,s,c) (__outsl((volatile u_int32_t *)(a), s, c))
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#define outs32(a,s,c) outsl(a,s,c)
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#define outsll(a,s,c) (__outsll((volatile u_int64_t *)(a), s, c))
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#define outs64(a,s,c) outsll(a,s,c)
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#define insb(a,d,c) (__insb((volatile u_int8_t *)(a), d, c))
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#define ins8(a,d,c) insb(a,d,c)
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#define insw(a,d,c) (__insw((volatile u_int16_t *)(a), d, c))
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#define ins16(a,d,c) insw(a,d,c)
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#define insl(a,d,c) (__insl((volatile u_int32_t *)(a), d, c))
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#define ins32(a,d,c) insl(a,d,c)
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#define insll(a,d,c) (__insll((volatile u_int64_t *)(a), d, c))
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#define ins64(a,d,c) insll(a,d,c)
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#define outs8rb(a,s,c) outsb(a,s,c)
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#define outswrb(a,s,c) (__outswrb((volatile u_int16_t *)(a), s, c))
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#define outs16rb(a,s,c) outswrb(a,s,c)
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#define outslrb(a,s,c) (__outslrb((volatile u_int32_t *)(a), s, c))
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#define outs32rb(a,s,c) outslrb(a,s,c)
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#define ins8rb(a,d,c) insb(a,d,c)
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#define inswrb(a,d,c) (__inswrb((volatile u_int16_t *)(a), d, c))
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#define ins16rb(a,d,c) inswrb(a,d,c)
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#define inslrb(a,d,c) (__inslrb((volatile u_int32_t *)(a), d, c))
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#define ins32rb(a,d,c) inslrb(a,d,c)
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#endif /*_MACHINE_PIO_H_*/
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