ee41e38d42
Intel Stratix 10 SoC includes a quad-core arm64 cluster and FPGA fabric. This adds support for reconfiguring FPGA. Accessing FPGA core of this SoC require the level of privilege EL3, while kernel runs in EL1 (lower) level of privilege. This provides an Intel service layer interface that uses SMCCC to pass queries to the secure-monitor (EL3). Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D21454
27 lines
579 B
Plaintext
27 lines
579 B
Plaintext
# $FreeBSD$
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ARM64 opt_global.h
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INTRNG opt_global.h
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SOCDEV_PA opt_global.h
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SOCDEV_VA opt_global.h
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THUNDERX_PASS_1_1_ERRATA opt_global.h
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VFP opt_global.h
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# Binary compatibility
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COMPAT_FREEBSD32 opt_global.h
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# EFI Runtime services support
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EFIRT opt_efirt.h
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# SoC Support
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SOC_ALLWINNER_A64 opt_soc.h
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SOC_ALLWINNER_H5 opt_soc.h
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SOC_BRCM_BCM2837 opt_soc.h
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SOC_CAVM_THUNDERX opt_soc.h
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SOC_HISI_HI6220 opt_soc.h
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SOC_INTEL_STRATIX10 opt_soc.h
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SOC_MARVELL_8K opt_soc.h
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SOC_ROCKCHIP_RK3328 opt_soc.h
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SOC_ROCKCHIP_RK3399 opt_soc.h
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SOC_XILINX_ZYNQ opt_soc.h
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