5f0a3583a9
- The device is based on Marvell 88F6281 system on chip. - More info about the platform at http://www.plugcomputer.org - To build the FreeBSD kernel: make buildkernel TARGET_ARCH=arm KERNCONF=SHEEVAPLUG - Installation notes at: http://wiki.freebsd.org/FreeBSDMarvell Submitted by: Michal Hajduk Obtained from: Semihalf
153 lines
4.7 KiB
C
153 lines
4.7 KiB
C
/*-
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* Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
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* Copyright (C) 2009 Semihalf
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of MARVELL nor the names of contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/bus.h>
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#include <machine/pte.h>
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#include <machine/pmap.h>
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#include <machine/vmparam.h>
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#include <arm/mv/mvreg.h>
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#include <arm/mv/mvvar.h>
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#include <arm/mv/mvwin.h>
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/*
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* Virtual address space layout:
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* -----------------------------
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* 0x0000_0000 - 0x7FFF_FFFF : User Process (2 GB)
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* 0x8000_0000 - 0xBBFF_FFFF : Unused (960 MB)
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* 0xBC00_0000 - 0xBDFF_FFFF : Device Bus: CS1 (32 MB)
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* 0xBE00_0000 - 0xBECF_FFFF : Unused (13 MB)
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* 0xBED0_0000 - 0xBEDF_FFFF : Device Bus: CS2 (1 MB)
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* 0xBEE0_0000 - 0xBEEF_FFFF : Device Bus: CS0 (1 MB)
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* 0xBEF0_0000 - 0xBEFF_FFFF : Device Bus: BOOT (1 MB)
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* 0xBF00_0000 - 0xBFFF_FFFF : Unused (16 MB)
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* 0xC000_0000 - virtual_avail : Kernel Reserved (text, data, page tables,
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* : stack etc.)
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* virtual-avail - 0xEFFF_FFFF : KVA (virtual_avail is typically < 0xc0a0_0000)
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* 0xF000_0000 - 0xF0FF_FFFF : No-Cache allocation area (16 MB)
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* 0xF100_0000 - 0xF10F_FFFF : SoC Integrated devices registers range (1 MB)
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* 0xF110_0000 - 0xF11F_FFFF : CESA SRAM (1 MB)
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* 0xF120_0000 - 0xFFFE_FFFF : Unused (237 MB + 960 kB)
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* 0xFFFF_0000 - 0xFFFF_0FFF : 'High' vectors page (4 kB)
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* 0xFFFF_1000 - 0xFFFF_1FFF : ARM_TP_ADDRESS/RAS page (4 kB)
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* 0xFFFF_2000 - 0xFFFF_FFFF : Unused (56 kB)
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*/
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/* Static device mappings. */
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const struct pmap_devmap pmap_devmap[] = {
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/*
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* Map the on-board devices VA == PA so that we can access them
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* with the MMU on or off.
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*/
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{ /* SoC integrated peripherals registers range */
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MV_BASE,
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MV_PHYS_BASE,
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MV_SIZE,
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VM_PROT_READ | VM_PROT_WRITE,
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PTE_NOCACHE,
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},
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{ /* CESA SRAM */
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MV_CESA_SRAM_BASE,
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MV_CESA_SRAM_PHYS_BASE,
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MV_CESA_SRAM_SIZE,
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VM_PROT_READ | VM_PROT_WRITE,
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PTE_NOCACHE,
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},
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{ 0, 0, 0, 0, 0, }
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};
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const struct gpio_config mv_gpio_config[] = {
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{ -1, -1, -1 }
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};
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void
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platform_mpp_init(void)
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{
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/*
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* MPP configuration for Sheeva Plug
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*
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* MPP[0]: NF_IO[2]
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* MPP[1]: NF_IO[3]
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* MPP[2]: NF_IO[4]
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* MPP[3]: NF_IO[5]
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* MPP[4]: NF_IO[6]
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* MPP[5]: NF_IO[7]
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* MPP[6]: SYSRST_OUTn
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* MPP[8]: UA0_RTS
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* MPP[9]: UA0_CTS
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* MPP[10]: UA0_TXD
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* MPP[11]: UA0_RXD
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* MPP[12]: SD_CLK
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* MPP[13]: SD_CMD
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* MPP[14]: SD_D[0]
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* MPP[15]: SD_D[1]
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* MPP[16]: SD_D[2]
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* MPP[17]: SD_D[3]
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* MPP[18]: NF_IO[0]
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* MPP[19]: NF_IO[1]
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* MPP[29]: TSMP[9]
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*
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* Others: GPIO
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*/
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bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL0, 0x01111111);
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bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL1, 0x11113322);
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bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL2, 0x00001111);
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bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL3, 0x00100000);
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bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL4, 0x00000000);
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bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL5, 0x00000000);
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bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL6, 0x00000000);
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}
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static void
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platform_identify(void *dummy)
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{
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soc_identify();
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/*
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* XXX Board identification e.g. read out from FPGA or similar should
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* go here
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*/
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}
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SYSINIT(platform_identify, SI_SUB_CPU, SI_ORDER_SECOND, platform_identify, NULL);
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